X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fevb64260%2Feth.c;h=eb87edcbfec7d8e322e3cb32047e8a1711e55ff7;hb=a53f4a29ac62a2e83d35a4a7b6d6969cf95a5902;hp=ca8bab52d96613c9d416a9d0f6ac36d9596629e1;hpb=d459516188af37da22a3b86914dbd81d83fac79f;p=u-boot

diff --git a/board/evb64260/eth.c b/board/evb64260/eth.c
index ca8bab52d9..eb87edcbfe 100644
--- a/board/evb64260/eth.c
+++ b/board/evb64260/eth.c
@@ -32,7 +32,7 @@ Skeleton NIC driver for Etherboot
 #include "eth.h"
 #include "eth_addrtbl.h"
 
-#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
+#if defined(CONFIG_CMD_NET)
 
 #define GT6426x_ETH_BUF_SIZE	1536
 
@@ -89,7 +89,7 @@ static const char ether_port_phy_addr[3]={4,5,6};
 /* MII PHY access routines are common for all i/f, use gal_ent0 */
 #define GT6426x_MII_DEVNAME	"gal_enet0"
 
-int gt6426x_miiphy_read(char *devname, unsigned char phy,
+int gt6426x_miiphy_read(const char *devname, unsigned char phy,
 		unsigned char reg, unsigned short *val);
 
 static inline unsigned short
@@ -127,31 +127,32 @@ static void gt6426x_handle_SMI(struct eth_dev_s *p, unsigned int icr)
 #endif
 
     if(icr&0x10000000) {
+#ifdef DEBUG
 	unsigned int psr;
+
 	psr=GTREGREAD(ETHERNET0_PORT_STATUS_REGISTER + p->reg_base);
-#ifdef DEBUG
 	printf("PHY state change:\n"
 	       "  GT:%s:%s:%s:%s\n",
-		psr&1?"100":" 10",
-		psr&8?" Link":"nLink",
-		psr&2?"FD":"HD",
-		psr&4?" FC":"nFC");
+		psr & 1 ? "100" : " 10",
+		psr & 8 ? " Link" : "nLink",
+		psr & 2 ? "FD" : "HD",
+		psr & 4 ? " FC" : "nFC");
 
 #ifdef CONFIG_INTEL_LXT97X /* non-standard mii reg (intel lxt972a) */
 	{
-	unsigned short mii_11;
-	mii_11=miiphy_read_ret(ether_port_phy_addr[p->dev],0x11);
-
-	printf(" mii:%s:%s:%s:%s %s:%s %s\n",
-		mii_11&(1<<14)?"100":" 10",
-		mii_11&(1<<10)?" Link":"nLink",
-		mii_11&(1<<9)?"FD":"HD",
-		mii_11&(1<<4)?" FC":"nFC",
-
-		mii_11&(1<<7)?"ANc":"ANnc",
-		mii_11&(1<<8)?"AN":"Manual",
-		""
-		);
+		unsigned short mii_11;
+		mii_11 = miiphy_read_ret(ether_port_phy_addr[p->dev], 0x11);
+
+		printf(" mii:%s:%s:%s:%s %s:%s %s\n",
+			mii_11 & (1 << 14) ? "100" : " 10",
+			mii_11 & (1 << 10) ? " Link" : "nLink",
+			mii_11 & (1 << 9) ? "FD" : "HD",
+			mii_11 & (1 << 4) ? " FC" : "nFC",
+
+			mii_11 & (1 << 7) ? "ANc" : "ANnc",
+			mii_11 & (1 << 8) ? "AN" : "Manual",
+			""
+			);
 	}
 #endif /* CONFIG_INTEL_LXT97X */
 #endif /* DEBUG */
@@ -345,7 +346,7 @@ gt6426x_eth_disable(void *v)
 MII utilities - write: write to an MII register via SMI
 ***************************************************************************/
 int
-gt6426x_miiphy_write(char *devname, unsigned char phy,
+gt6426x_miiphy_write(const char *devname, unsigned char phy,
 		unsigned char reg, unsigned short data)
 {
     unsigned int temp= (reg<<21) | (phy<<16) | data;
@@ -360,7 +361,7 @@ gt6426x_miiphy_write(char *devname, unsigned char phy,
 MII utilities - read: read from an MII register via SMI
 ***************************************************************************/
 int
-gt6426x_miiphy_read(char *devname, unsigned char phy,
+gt6426x_miiphy_read(const char *devname, unsigned char phy,
 		unsigned char reg, unsigned short *val)
 {
     unsigned int temp= (reg<<21) | (phy<<16) | 1<<26;
@@ -422,24 +423,24 @@ gt6426x_dump_mii(bd_t *bis, unsigned short phy)
 static void
 check_phy_state(struct eth_dev_s *p)
 {
-	int bmsr = miiphy_read_ret(ether_port_phy_addr[p->dev], PHY_BMSR);
+	int bmsr = miiphy_read_ret(ether_port_phy_addr[p->dev], MII_BMSR);
 	int psr = GTREGREAD(ETHERNET0_PORT_STATUS_REGISTER + p->reg_base);
 
-	if ((psr & 1<<3) && (bmsr & PHY_BMSR_LS)) {
-		int nego = miiphy_read_ret(ether_port_phy_addr[p->dev], PHY_ANAR) &
-				miiphy_read_ret(ether_port_phy_addr[p->dev], PHY_ANLPAR);
+	if ((psr & 1<<3) && (bmsr & BMSR_LSTATUS)) {
+		int nego = miiphy_read_ret(ether_port_phy_addr[p->dev], MII_ADVERTISE) &
+				miiphy_read_ret(ether_port_phy_addr[p->dev], MII_LPA);
 		int want;
 
-		if (nego & PHY_ANLPAR_TXFD) {
+		if (nego & LPA_100FULL) {
 			want = 0x3;
 			printf("MII: 100Base-TX, Full Duplex\n");
-		} else if (nego & PHY_ANLPAR_TX) {
+		} else if (nego & LPA_100HALF) {
 			want = 0x1;
 			printf("MII: 100Base-TX, Half Duplex\n");
-		} else if (nego & PHY_ANLPAR_10FD) {
+		} else if (nego & LPA_10FULL) {
 			want = 0x2;
 			printf("MII: 10Base-T, Full Duplex\n");
-		} else if (nego & PHY_ANLPAR_10) {
+		} else if (nego & LPA_10HALF) {
 			want = 0x0;
 			printf("MII: 10Base-T, Half Duplex\n");
 		} else {
@@ -685,7 +686,7 @@ gt6426x_eth_initialize(bd_t *bis)
 			return;
 		}
 
-		/* must be less than NAMESIZE (16) */
+		/* must be less than sizeof(dev->name) */
 		sprintf(dev->name, "gal_enet%d", devnum);
 
 #ifdef DEBUG
@@ -708,7 +709,7 @@ gt6426x_eth_initialize(bd_t *bis)
 				return;
 		}
 
-		temp = getenv_r (s, buf, sizeof(buf));
+		temp = getenv_f(s, buf, sizeof(buf));
 		s = (temp > 0) ? buf : NULL;
 
 #ifdef DEBUG