X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Ffads%2Ffads.c;h=9f7faaf47d7cef1f202fa7e6ce2347426e2dcd96;hb=6d8d4ef994a7c46e34b5fe53b1af7aa4f78192bf;hp=3856b45cdf247d84d74ce149485af569f31e4444;hpb=2535d60277cc295adf75cd5721dcecd840c69a63;p=u-boot diff --git a/board/fads/fads.c b/board/fads/fads.c index 3856b45cdf..9f7faaf47d 100644 --- a/board/fads/fads.c +++ b/board/fads/fads.c @@ -1,7 +1,9 @@ /* - * (C) Copyright 2000 + * (C) Copyright 2000-2004 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * + * Modified by, Yuli Barcohen, Arabella Software Ltd., yuli@arabellasw.com + * * See file CREDITS for list of people who contributed to this * project. * @@ -21,15 +23,17 @@ * MA 02111-1307 USA */ -#include #include +#include #include -#include "fads.h" - -/* ------------------------------------------------------------------------- */ +#include #define _NOT_USED_ 0xFFFFFFFF +/* ========================================================================= */ + +#ifndef CONFIG_MPC885ADS /* No old DRAM on MPC885ADS */ + #if defined(CONFIG_DRAM_50MHZ) /* 50MHz tables */ static const uint dram_60ns[] = @@ -183,148 +187,10 @@ static const uint edo_70ns[] = #error dram not correctly defined - use CONFIG_DRAM_25MHZ or CONFIG_DRAM_50MHZ #endif -/* ------------------------------------------------------------------------- */ - - -/* - * Check Board Identity: - */ - -#if defined(CONFIG_FADS) && !defined(CONFIG_MPC86xADS) -static void checkdboard(void) -{ - /* get db type from BCSR 3 */ - uint k = (*((uint *)BCSR3) >> 24) & 0x3f; - - printf(" with db "); - - switch(k) { - case 0x03 : - puts ("MPC823"); - break; - case 0x20 : - puts ("MPC801"); - break; - case 0x21 : - puts ("MPC850"); - break; - case 0x22 : - puts ("MPC821, MPC860 / MPC860SAR / MPC860T"); - break; - case 0x23 : - puts ("MPC860SAR"); - break; - case 0x24 : - case 0x2A : - puts ("MPC860T"); - break; - case 0x3F : - puts ("MPC850SAR"); - break; - default : printf("0x%x", k); - } -} -#endif /* defined(CONFIG_FADS) && !defined(CONFIG_MPC86xADS) */ - -int checkboard (void) -{ - /* get revision from BCSR 3 */ - uint r = (((*((uint *) BCSR3) >> 23) & 1) << 3) - | (((*((uint *) BCSR3) >> 19) & 1) << 2) - | (((*((uint *) BCSR3) >> 16) & 3)); - - puts ("Board: "); - -#ifdef CONFIG_FADS -# ifdef CONFIG_MPC86xADS - puts ("MPC86xADS"); -# else - puts ("FADS"); - checkdboard (); -# endif /* !CONFIG_MPC86xADS */ - printf (" rev "); - - switch (r) { - case 0x00: - puts ("ENG\n"); - break; - case 0x01: - puts ("PILOT\n"); - break; - default: - printf ("unknown (0x%x)\n", r); - return (-1); - } -#endif /* CONFIG_FADS */ - -#ifdef CONFIG_ADS - printf ("ADS rev "); - - switch (r) { - case 0x00: - puts ("ENG - this board sucks, check the errata, not supported\n"); - return -1; - case 0x01: - puts ("PILOT - warning, read errata \n"); - break; - case 0x02: - puts ("A - warning, read errata \n"); - break; - case 0x03: - puts ("B \n"); - break; - default: - printf ("unknown revision (0x%x)\n", r); - return (-1); - } -#endif /* CONFIG_ADS */ - - return 0; -} - -/* ------------------------------------------------------------------------- */ -static long int dram_size (long int *base, long int maxsize) -{ - volatile long int *addr=base; - ulong cnt, val; - ulong save[32]; /* to make test non-destructive */ - unsigned char i = 0; - - for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) { - addr = base + cnt; /* pointer arith! */ - - save[i++] = *addr; - *addr = ~cnt; - } - - /* write 0 to base address */ - addr = base; - save[i] = *addr; - *addr = 0; - - /* check at base address */ - if ((val = *addr) != 0) { - *addr = save[i]; - return (0); - } - - for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) { - addr = base + cnt; /* pointer arith! */ - - val = *addr; - *addr = save[--i]; - - if (val != (~cnt)) { - return (cnt * sizeof (long)); - } - } - return (maxsize); -} - /* ------------------------------------------------------------------------- */ static int _draminit (uint base, uint noMbytes, uint edo, uint delay) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; /* init upm */ @@ -360,7 +226,11 @@ static int _draminit (uint base, uint noMbytes, uint edo, uint delay) switch (noMbytes) { case 4: /* 4 Mbyte uses only CS2 */ +#ifdef CONFIG_ADS + memctl->memc_mamr = 0xc0a21114; +#else memctl->memc_mamr = 0x13a01114; /* PTA 0x13 AMA 010 */ +#endif memctl->memc_or2 = 0xffc00800; /* 4M */ break; @@ -393,17 +263,18 @@ static int _draminit (uint base, uint noMbytes, uint edo, uint delay) memctl->memc_br2 = 0x81 + base; /* use upma */ + *((uint *) BCSR1) &= ~BCSR1_DRAM_EN; /* enable dram */ + /* if no dimm is inserted, noMbytes is still detected as 8m, so * sanity check top and bottom of memory */ - *((uint *) BCSR1) &= ~BCSR1_DRAM_EN; /* enable dram */ - - /* check bytes / 2 because dram_size tests at base+bytes, which + /* check bytes / 2 because get_ram_size tests at base+bytes, which * is not mapped */ - if (dram_size ((long *) base, noMbytes << 19) != noMbytes << 19) { - *((uint *) BCSR1) |= BCSR1_DRAM_EN; /* disable dram */ - return -1; - } + if (noMbytes == 8) + if (get_ram_size ((long *) base, noMbytes << 19) != noMbytes << 19) { + *((uint *) BCSR1) |= BCSR1_DRAM_EN; /* disable dram */ + return -1; + } return 0; } @@ -412,7 +283,7 @@ static int _draminit (uint base, uint noMbytes, uint edo, uint delay) static void _dramdisable(void) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; memctl->memc_br2 = 0x00000000; @@ -420,9 +291,11 @@ static void _dramdisable(void) /* maybe we should turn off upma here or something */ } +#endif /* !CONFIG_MPC885ADS */ -#ifdef CONFIG_FADS -/* SDRAM SUPPORT (FADS ONLY) */ +/* ========================================================================= */ + +#ifdef CONFIG_FADS /* SDRAM exists on FADS and newer boards */ #if defined(CONFIG_SDRAM_100MHZ) @@ -550,7 +423,7 @@ static const uint sdram_table[] = static int _initsdram(uint base, uint noMbytes) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; upmconfig(UPMB, (uint *)sdram_table,sizeof(sdram_table)/sizeof(uint)); @@ -576,19 +449,19 @@ static int _initsdram(uint base, uint noMbytes) /* Now run the precharge/nop/mrs commands. */ - memctl->memc_mcr = 0x80808111; /* run umpb cs4 1 count 1, addr 0x11 ??? (50Mhz) */ - /* run umpb cs4 1 count 1, addr 0x11 precharge+MRS (100Mhz) */ + memctl->memc_mcr = 0x80808111; /* run umpb cs4 1 count 1, addr 0x11 ??? (50MHz) */ + /* run umpb cs4 1 count 1, addr 0x11 precharge+MRS (100MHz) */ udelay(200); /* Run 8 refresh cycles */ - memctl->memc_mcr = SDRAM_MCRVALUE0; /* run upmb cs4 loop 1 addr 0x5 precharge+MRS (50 Mhz)*/ + memctl->memc_mcr = SDRAM_MCRVALUE0; /* run upmb cs4 loop 1 addr 0x5 precharge+MRS (50 MHz)*/ /* run upmb cs4 loop 1 addr 0x11 precharge+MRS (100MHz) */ udelay(200); - memctl->memc_mbmr = SDRAM_MBMRVALUE1; /* TLF 4 (100 Mhz) or TLF 8 (50MHz) */ - memctl->memc_mcr = SDRAM_MCRVALUE1; /* run upmb cs4 loop 1 addr 0x30 refr (50 Mhz) */ + memctl->memc_mbmr = SDRAM_MBMRVALUE1; /* TLF 4 (100 MHz) or TLF 8 (50MHz) */ + memctl->memc_mcr = SDRAM_MCRVALUE1; /* run upmb cs4 loop 1 addr 0x30 refr (50 MHz) */ /* run upmb cs4 loop 1 addr 0x11 precharge+MRS ??? (100MHz) */ udelay(200); @@ -628,7 +501,7 @@ static int _initsdram(uint base, uint noMbytes) static int _initsdram(uint base, uint noMbytes) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; upmconfig(UPMB, (uint *)sdram_table,sizeof(sdram_table)/sizeof(uint)); @@ -691,7 +564,7 @@ static int _initsdram(uint base, uint noMbytes) static void _sdramdisable(void) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; memctl->memc_br4 = 0x00000000; @@ -703,7 +576,7 @@ static void _sdramdisable(void) static int initsdram(uint base, uint *noMbytes) { - uint m = CFG_SDRAM_SIZE>>20; + uint m = CONFIG_SYS_SDRAM_SIZE>>20; /* _initsdram needs access to sdram */ *((uint *)BCSR1) |= BCSR1_SDRAM_EN; /* enable sdram */ @@ -723,15 +596,18 @@ static int initsdram(uint base, uint *noMbytes) } } -/* SDRAM SUPPORT (FADS ONLY) */ #endif /* CONFIG_FADS */ -long int initdram (int board_type) +/* ========================================================================= */ + +phys_size_t initdram (int board_type) { uint sdramsz = 0; /* size of sdram in Mbytes */ uint base = 0; /* base of dram in bytes */ uint m = 0; /* size of dram in Mbytes */ +#ifndef CONFIG_MPC885ADS uint k, s; +#endif #ifdef CONFIG_FADS if (!initsdram (0x00000000, &sdramsz)) { @@ -739,7 +615,7 @@ long int initdram (int board_type) printf ("(%u MB SDRAM) ", sdramsz); } #endif - +#ifndef CONFIG_MPC885ADS /* No old DRAM on MPC885ADS */ k = (*((uint *) BCSR2) >> 23) & 0x0f; switch (k & 0x3) { @@ -790,17 +666,9 @@ long int initdram (int board_type) _dramdisable (); m = 0; } - +#endif /* !CONFIG_MPC885ADS */ m += sdramsz; /* add sdram size to total */ - if (!m) { - /******************************** - *DRAM ERROR, HALT PROCESSOR - *********************************/ - while (1); - return -1; - } - return (m << 20); } @@ -814,35 +682,130 @@ int testdram (void) return (0); } +/* ========================================================================= */ + +/* + * Check Board Identity: + */ + +#if defined(CONFIG_FADS) && defined(CONFIG_SYS_DAUGHTERBOARD) +static void checkdboard(void) +{ + /* get db type from BCSR 3 */ + uint k = (*((uint *)BCSR3) >> 24) & 0x3f; + + puts (" with db "); + + switch(k) { + case 0x03 : + puts ("MPC823"); + break; + case 0x20 : + puts ("MPC801"); + break; + case 0x21 : + puts ("MPC850"); + break; + case 0x22 : + puts ("MPC821, MPC860 / MPC860SAR / MPC860T"); + break; + case 0x23 : + puts ("MPC860SAR"); + break; + case 0x24 : + case 0x2A : + puts ("MPC860T"); + break; + case 0x3F : + puts ("MPC850SAR"); + break; + default : printf("0x%x", k); + } +} +#endif /* defined(CONFIG_FADS) && defined(CONFIG_SYS_DAUGHTERBOARD) */ + +int checkboard (void) +{ +#if defined(CONFIG_MPC86xADS) + puts ("Board: MPC86xADS\n"); +#elif defined(CONFIG_MPC885ADS) + puts ("Board: MPC885ADS\n"); +#else /* Only old ADS/FADS have got revision ID in BCSR3 */ + uint r = (((*((uint *) BCSR3) >> 23) & 1) << 3) + | (((*((uint *) BCSR3) >> 19) & 1) << 2) + | (((*((uint *) BCSR3) >> 16) & 3)); + + puts ("Board: "); +#if defined(CONFIG_FADS) + puts ("FADS"); + checkdboard (); +#else + puts ("ADS"); +#endif -#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) + puts (" rev "); -#ifdef CFG_PCMCIA_MEM_ADDR -volatile unsigned char *pcmcia_mem = (unsigned char*)CFG_PCMCIA_MEM_ADDR; + switch (r) { +#if defined(CONFIG_ADS) + case 0x00: + puts ("ENG - this board sucks, check the errata, not supported\n"); + return -1; + case 0x01: + puts ("PILOT - warning, read errata \n"); + break; + case 0x02: + puts ("A - warning, read errata \n"); + break; + case 0x03: + puts ("B\n"); + break; +#else /* FADS */ + case 0x00: + puts ("ENG\n"); + break; + case 0x01: + puts ("PILOT\n"); + break; +#endif /* CONFIG_ADS */ + default: + printf ("unknown (0x%x)\n", r); + return -1; + } +#endif /* CONFIG_MPC86xADS */ + + return 0; +} + +/* ========================================================================= */ + +#if defined(CONFIG_CMD_PCMCIA) + +#ifdef CONFIG_SYS_PCMCIA_MEM_ADDR +volatile unsigned char *pcmcia_mem = (unsigned char*)CONFIG_SYS_PCMCIA_MEM_ADDR; #endif int pcmcia_init(void) { volatile pcmconf8xx_t *pcmp; - uint v, slota, slotb; + uint v, slota = 0, slotb = 0; /* ** Enable the PCMCIA for a Flash card. */ - pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia)); + pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia)); #if 0 - pcmp->pcmc_pbr0 = CFG_PCMCIA_MEM_ADDR; + pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_MEM_ADDR; pcmp->pcmc_por0 = 0xc00ff05d; #endif /* Set all slots to zero by default. */ pcmp->pcmc_pgcra = 0; pcmp->pcmc_pgcrb = 0; -#ifdef PCMCIA_SLOT_A +#ifdef CONFIG_PCMCIA_SLOT_A pcmp->pcmc_pgcra = 0x40; #endif -#ifdef PCMCIA_SLOT_B +#ifdef CONFIG_PCMCIA_SLOT_B pcmp->pcmc_pgcrb = 0x40; #endif @@ -851,17 +814,17 @@ int pcmcia_init(void) /* Check if any PCMCIA card is plugged in. */ +#ifdef CONFIG_PCMCIA_SLOT_A slota = (pcmp->pcmc_pipr & 0x18000000) == 0 ; +#endif +#ifdef CONFIG_PCMCIA_SLOT_B slotb = (pcmp->pcmc_pipr & 0x00001800) == 0 ; +#endif if (!(slota || slotb)) { printf("No card present\n"); -#ifdef PCMCIA_SLOT_A pcmp->pcmc_pgcra = 0; -#endif -#ifdef PCMCIA_SLOT_B pcmp->pcmc_pgcrb = 0; -#endif return -1; } else @@ -881,7 +844,7 @@ int pcmcia_init(void) switch ((pcmp->pcmc_pipr >> 14) & 3) #endif { - case 0x00 : + case 0x03 : printf("5V"); v = 5; break; @@ -893,7 +856,7 @@ int pcmcia_init(void) v = 5; #endif break; - case 0x03 : + case 0x00 : printf("5V, 3V and x.xV"); #ifdef CONFIG_FADS v = 3; /* User lower voltage if supported! */ @@ -942,9 +905,10 @@ int pcmcia_init(void) udelay(20); -#ifdef PCMCIA_SLOT_A +#ifdef CONFIG_PCMCIA_SLOT_A pcmp->pcmc_pgcra = 0; -#elif PCMCIA_SLOT_B +#endif +#ifdef CONFIG_PCMCIA_SLOT_B pcmp->pcmc_pgcrb = 0; #endif @@ -957,30 +921,29 @@ int pcmcia_init(void) return 0; } -#endif /* CFG_CMD_PCMCIA */ +#endif -/* ------------------------------------------------------------------------- */ +/* ========================================================================= */ -#ifdef CFG_PC_IDE_RESET +#ifdef CONFIG_SYS_PC_IDE_RESET void ide_set_reset(int on) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; /* * Configure PC for IDE Reset Pin */ if (on) { /* assert RESET */ - immr->im_ioport.iop_pcdat &= ~(CFG_PC_IDE_RESET); + immr->im_ioport.iop_pcdat &= ~(CONFIG_SYS_PC_IDE_RESET); } else { /* release RESET */ - immr->im_ioport.iop_pcdat |= CFG_PC_IDE_RESET; + immr->im_ioport.iop_pcdat |= CONFIG_SYS_PC_IDE_RESET; } /* program port pin as GPIO output */ - immr->im_ioport.iop_pcpar &= ~(CFG_PC_IDE_RESET); - immr->im_ioport.iop_pcso &= ~(CFG_PC_IDE_RESET); - immr->im_ioport.iop_pcdir |= CFG_PC_IDE_RESET; + immr->im_ioport.iop_pcpar &= ~(CONFIG_SYS_PC_IDE_RESET); + immr->im_ioport.iop_pcso &= ~(CONFIG_SYS_PC_IDE_RESET); + immr->im_ioport.iop_pcdir |= CONFIG_SYS_PC_IDE_RESET; } -#endif /* CFG_PC_IDE_RESET */ -/* ------------------------------------------------------------------------- */ +#endif /* CONFIG_SYS_PC_IDE_RESET */