X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Ffreescale%2Fb4860qds%2Ftlb.c;h=7b55b860d088f00a85a3d301dd2bf4cb995552a1;hb=557a3319089499aa0e55d65a6b43b7137f362003;hp=f71aca4092000d2d6dc2463f6ab5961bfef9e7fe;hpb=326ea986ac150acdc7656d57fca647db80b50158;p=u-boot

diff --git a/board/freescale/b4860qds/tlb.c b/board/freescale/b4860qds/tlb.c
index f71aca4092..7b55b860d0 100644
--- a/board/freescale/b4860qds/tlb.c
+++ b/board/freescale/b4860qds/tlb.c
@@ -62,13 +62,14 @@ struct fsl_e_tlb_entry tlb_table[] = {
 		      MAS3_SX|MAS3_SR, MAS2_W|MAS2_G,
 		      0, 2, BOOKE_PAGESZ_256M, 1),
 
+#ifndef CONFIG_SPL_BUILD
 	/* *I*G* - PCI */
 	SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
 		      0, 3, BOOKE_PAGESZ_256M, 1),
 
 	SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x10000000,
-                      CONFIG_SYS_PCIE1_MEM_PHYS + 0x10000000,
+		      CONFIG_SYS_PCIE1_MEM_PHYS + 0x10000000,
 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
 		      0, 4, BOOKE_PAGESZ_256M, 1),
 
@@ -96,6 +97,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
 		      0, 9, BOOKE_PAGESZ_16M, 1),
 #endif
+#endif
 #ifdef CONFIG_SYS_DCSRBAR_PHYS
 	SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
@@ -118,6 +120,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
 	 * entry 14 and 15 has been used hard coded, they will be disabled
 	 * in cpu_init_f, so we use entry 16 for SRIO2.
 	 */
+#ifndef CONFIG_SPL_BUILD
 #ifdef CONFIG_SYS_SRIO1_MEM_PHYS
 	/* *I*G* - SRIO1 */
 	SET_TLB_ENTRY(1, CONFIG_SYS_SRIO1_MEM_VIRT, CONFIG_SYS_SRIO1_MEM_PHYS,
@@ -140,6 +143,13 @@ struct fsl_e_tlb_entry tlb_table[] = {
 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_G,
 		      0, 17, BOOKE_PAGESZ_1M, 1),
 #endif
+#endif
+
+#if defined(CONFIG_RAMBOOT_PBL) && !defined(CONFIG_SPL_BUILD)
+	SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
+		      MAS3_SX|MAS3_SW|MAS3_SR, 0,
+		      0, 17, BOOKE_PAGESZ_2G, 1)
+#endif
 };
 
 int num_tlb_entries = ARRAY_SIZE(tlb_table);