X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Ffreescale%2Fcommon%2Fpixis.c;h=45dcf4dab03d425e9d867a6a1a7badef747d7237;hb=f1cd7aabbbbe75e3e7bc369de080950bf5a09759;hp=99cc2ee197ed1e1e8a83c5dc1a6cca974b0925fb;hpb=85fad497b3c2e99fa48d18351d2898cf8cdbe898;p=u-boot diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c index 99cc2ee197..45dcf4dab0 100644 --- a/board/freescale/common/pixis.c +++ b/board/freescale/common/pixis.c @@ -25,8 +25,9 @@ #include #include #include -#include +#ifdef CONFIG_FSL_PIXIS +#include #include "pixis.h" @@ -206,13 +207,16 @@ void read_from_px_regs_altbank(int set) out8(PIXIS_BASE + PIXIS_VCFGEN1, tmp); } +#ifndef CFG_PIXIS_VBOOT_MASK +#define CFG_PIXIS_VBOOT_MASK 0x40 +#endif void set_altbank(void) { u8 tmp; tmp = in8(PIXIS_BASE + PIXIS_VBOOT); - tmp ^= 0x40; + tmp ^= CFG_PIXIS_VBOOT_MASK; out8(PIXIS_BASE + PIXIS_VBOOT, tmp); } @@ -470,3 +474,4 @@ U_BOOT_CMD( " pixis_reset altbank cf \n" " pixis_reset cf \n" ); +#endif /* CONFIG_FSL_PIXIS */