X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Ffreescale%2Fcorenet_ds%2Fddr.c;h=e7e893a1aec412e6217c4cfd0f9cd6c22ca70412;hb=eb5c18078dfab0bfab5409d365ad3902b18a04c7;hp=4a53b8d9337efc9ae96b062328427da0ff0f0faf;hpb=0dd78fb9430e57ccc8e63369c6082b1c730f8aeb;p=u-boot

diff --git a/board/freescale/corenet_ds/ddr.c b/board/freescale/corenet_ds/ddr.c
index 4a53b8d933..e7e893a1ae 100644
--- a/board/freescale/corenet_ds/ddr.c
+++ b/board/freescale/corenet_ds/ddr.c
@@ -10,8 +10,8 @@
 #include <i2c.h>
 #include <hwconfig.h>
 #include <asm/mmu.h>
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
 #include <asm/fsl_law.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -56,14 +56,14 @@ phys_size_t fixed_sdram(void)
 
 	ddr_size = (phys_size_t) CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
 	ddr_cfg_regs.ddr_cdr1 = DDR_CDR1_DHC_EN;
-	fsl_ddr_set_memctl_regs(&ddr_cfg_regs, 0);
+	fsl_ddr_set_memctl_regs(&ddr_cfg_regs, 0, 0);
 
 #if (CONFIG_NUM_DDR_CONTROLLERS == 2)
 	memcpy(&ddr_cfg_regs,
 		fixed_ddr_parm_1[i].ddr_settings,
 		sizeof(ddr_cfg_regs));
 	ddr_cfg_regs.ddr_cdr1 = DDR_CDR1_DHC_EN;
-	fsl_ddr_set_memctl_regs(&ddr_cfg_regs, 1);
+	fsl_ddr_set_memctl_regs(&ddr_cfg_regs, 1, 0);
 #endif
 
 	/*
@@ -114,7 +114,7 @@ struct board_specific_parameters {
 	u32 wrlvl_start;
 	u32 cpo;
 	u32 write_data_delay;
-	u32 force_2T;
+	u32 force_2t;
 };
 
 /*
@@ -139,8 +139,8 @@ static const struct board_specific_parameters udimm0[] = {
 	{2,  1250,    4,     6,   0xff,    2,  0},
 	{2,  1350,    5,     7,   0xff,    2,  0},
 	{2,  1666,    5,     8,   0xff,    2,  0},
-	{1,   850,    4,     5,   0xff,    2,  0},
-	{1,   950,    4,     7,   0xff,    2,  0},
+	{1,  1250,    4,     6,   0xff,    2,  0},
+	{1,  1335,    4,     7,   0xff,    2,  0},
 	{1,  1666,    4,     8,   0xff,    2,  0},
 	{}
 };
@@ -217,7 +217,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
 					pbsp->write_data_delay;
 				popts->clk_adjust = pbsp->clk_adjust;
 				popts->wrlvl_start = pbsp->wrlvl_start;
-				popts->twoT_en = pbsp->force_2T;
+				popts->twot_en = pbsp->force_2t;
 				goto found;
 			}
 			pbsp_highest = pbsp;
@@ -234,7 +234,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
 		popts->write_data_delay = pbsp_highest->write_data_delay;
 		popts->clk_adjust = pbsp_highest->clk_adjust;
 		popts->wrlvl_start = pbsp_highest->wrlvl_start;
-		popts->twoT_en = pbsp_highest->force_2T;
+		popts->twot_en = pbsp_highest->force_2t;
 	} else {
 		panic("DIMM is not supported by this board");
 	}