X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Ffreescale%2Fls2080aqds%2FREADME;h=8e31e9e41e3e18744d93b6778924b10b9aa3a41b;hb=470135be276b2d92c6da464c68839202d4ff0d08;hp=6ddad92f2cf121d26d9989e1b99667ed4694ad5b;hpb=a187559e3d586891c917279044c5386d1b2adc6e;p=u-boot

diff --git a/board/freescale/ls2080aqds/README b/board/freescale/ls2080aqds/README
index 6ddad92f2c..8e31e9e41e 100644
--- a/board/freescale/ls2080aqds/README
+++ b/board/freescale/ls2080aqds/README
@@ -2,53 +2,14 @@ Overview
 --------
 The LS2080A Development System (QDS) is a high-performance computing,
 evaluation, and development platform that supports the QorIQ LS2080A
-Layerscape Architecture processor. The LS2080AQDS provides validation and
-SW development platform for the Freescale LS2080A processor series, with
-a complete debugging environment.
-
-LS2080A SoC Overview
-------------------
-The LS2080A integrated multicore processor combines eight ARM Cortex-A57
-processor cores with high-performance data path acceleration logic and network
-and peripheral bus interfaces required for networking, telecom/datacom,
-wireless infrastructure, and mil/aerospace applications.
-
-The LS2080A SoC includes the following function and features:
-
- - Eight 64-bit ARM Cortex-A57 CPUs
- - 1 MB platform cache with ECC
- - Two 64-bit DDR4 SDRAM memory controllers with ECC and interleaving support
- - One secondary 32-bit DDR4 SDRAM memory controller, intended for use by
-  the AIOP
- - Data path acceleration architecture (DPAA2) incorporating acceleration for
- the following functions:
-   - Packet parsing, classification, and distribution (WRIOP)
-   - Queue and Hardware buffer management for scheduling, packet sequencing, and
-     congestion management, buffer allocation and de-allocation (QBMan)
-   - Cryptography acceleration (SEC) at up to 10 Gbps
-   - RegEx pattern matching acceleration (PME) at up to 10 Gbps
-   - Decompression/compression acceleration (DCE) at up to 20 Gbps
-   - Accelerated I/O processing (AIOP) at up to 20 Gbps
-   - QDMA engine
- - 16 SerDes lanes at up to 10.3125 GHz
- - Ethernet interfaces
-   - Up to eight 10 Gbps Ethernet MACs
-   - Up to eight 1 / 2.5 Gbps Ethernet MACs
- - High-speed peripheral interfaces
-   - Four PCIe 3.0 controllers, one supporting SR-IOV
- - Additional peripheral interfaces
-   - Two serial ATA (SATA 3.0) controllers
-   - Two high-speed USB 3.0 controllers with integrated PHY
-   - Enhanced secure digital host controller (eSDXC/eMMC)
-   - Serial peripheral interface (SPI) controller
-   - Quad Serial Peripheral Interface (QSPI) Controller
-   - Four I2C controllers
-   - Two DUARTs
-   - Integrated flash controller (IFC 2.0) supporting NAND and NOR flash
- - Support for hardware virtualization and partitioning enforcement
- - QorIQ platform's trust architecture 3.0
- - Service processor (SP) provides pre-boot initialization and secure-boot
-  capabilities
+and LS2088A Layerscape Architecture processor. The LS2080AQDS provides
+validation and SW development platform for the Freescale LS2080A, LS2088A
+processor series, with a complete debugging environment.
+
+LS2080A, LS2088A SoC Overview
+--------------------
+Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS2080A,
+LS2088A SoC overview.
 
  LS2080AQDS board Overview
  -----------------------
@@ -128,6 +89,32 @@ c) NAND boot
 d) SD boot
 e) QSPI boot
 
+Memory map for NOR boot
+-------------------------
+Image				Flash Offset
+RCW+PBI				0x00000000
+Boot firmware (U-Boot)		0x00100000
+Boot firmware Environment	0x00300000
+PPA firmware			0x00400000
+Secure Headers			0x00600000
+DPAA2 MC			0x00A00000
+DPAA2 DPL			0x00D00000
+DPAA2 DPC			0x00E00000
+Kernel.itb			0x01000000
+
+Memory map for SD boot
+-------------------------
+Image				Flash Offset	SD Card
+						Start Block No.
+RCW+PBI				0x00000000	0x00008
+Boot firmware (U-Boot)		0x00100000	0x00800
+Boot firmware Environment	0x00300000	0x01800
+PPA firmware			0x00400000	0x02000
+DPAA2 MC			0x00A00000	0x05000
+DPAA2 DPL			0x00D00000	0x06800
+DPAA2 DPC			0x00E00000	0x07000
+Kernel.itb			0x01000000	0x08000
+
 Environment Variables
 ---------------------
 - mcboottimeout: MC boot timeout in milliseconds. If this variable is not defined
@@ -151,7 +138,7 @@ X-QSGMII-16PORT riser card
 ----------------------------
 The X-QSGMII-16PORT is a 4xQSGMII/8xSGMII riser card with eighth SerDes
 interfaces implemented in PCIe form factor board.
-It supports followings
+It supports following:
  - Card can operate with up to 4 QSGMII lane simultaneously
  - Card can operate with up to 8 SGMII lane simultaneously