X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Ffreescale%2Fm548xevb%2Fm548xevb.c;h=05361550b35d394970a5785741d5a294747b1efb;hb=8e4ba5e0ff02fb7932cb4d9971f88c9a35a31902;hp=4a2a5c78fb7441da69254b9709015d7618842196;hpb=f82642e33899766892499b163e60560fbbf87773;p=u-boot

diff --git a/board/freescale/m548xevb/m548xevb.c b/board/freescale/m548xevb/m548xevb.c
index 4a2a5c78fb..05361550b3 100644
--- a/board/freescale/m548xevb/m548xevb.c
+++ b/board/freescale/m548xevb/m548xevb.c
@@ -2,32 +2,17 @@
  * (C) Copyright 2000-2003
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <config.h>
 #include <common.h>
 #include <pci.h>
 #include <asm/immap.h>
+#include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -40,11 +25,14 @@ int checkboard(void)
 
 phys_size_t initdram(int board_type)
 {
-	volatile siu_t *siu = (siu_t *) (MMAP_SIU);
-	volatile sdram_t *sdram = (volatile sdram_t *)(MMAP_SDRAM);
+	siu_t *siu = (siu_t *) (MMAP_SIU);
+	sdram_t *sdram = (sdram_t *)(MMAP_SDRAM);
 	u32 dramsize, i;
+#ifdef CONFIG_SYS_DRAMSZ1
+	u32 temp;
+#endif
 
-	siu->drv = CONFIG_SYS_SDRAM_DRVSTRENGTH;
+	out_be32(&siu->drv, CONFIG_SYS_SDRAM_DRVSTRENGTH);
 
 	dramsize = CONFIG_SYS_DRAMSZ * 0x100000;
 	for (i = 0x13; i < 0x20; i++) {
@@ -52,7 +40,7 @@ phys_size_t initdram(int board_type)
 			break;
 	}
 	i--;
-	siu->cs0cfg = (CONFIG_SYS_SDRAM_BASE | i);
+	out_be32(&siu->cs0cfg, CONFIG_SYS_SDRAM_BASE | i);
 
 #ifdef CONFIG_SYS_DRAMSZ1
 	temp = CONFIG_SYS_DRAMSZ1 * 0x100000;
@@ -62,31 +50,32 @@ phys_size_t initdram(int board_type)
 	}
 	i--;
 	dramsize += temp;
-	siu->cs1cfg = ((CONFIG_SYS_SDRAM_BASE + temp) | i);
+	out_be32(&siu->cs1cfg, (CONFIG_SYS_SDRAM_BASE + temp) | i);
 #endif
 
-	sdram->cfg1 = CONFIG_SYS_SDRAM_CFG1;
-	sdram->cfg2 = CONFIG_SYS_SDRAM_CFG2;
+	out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1);
+	out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2);
 
 	/* Issue PALL */
-	sdram->ctrl = CONFIG_SYS_SDRAM_CTRL | 2;
+	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
 
 	/* Issue LEMR */
-	sdram->mode = CONFIG_SYS_SDRAM_EMOD;
-	sdram->mode = (CONFIG_SYS_SDRAM_MODE | 0x04000000);
+	out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD);
+	out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE | 0x04000000);
 
 	udelay(500);
 
 	/* Issue PALL */
-	sdram->ctrl = (CONFIG_SYS_SDRAM_CTRL | 2);
+	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
 
 	/* Perform two refresh cycles */
-	sdram->ctrl = CONFIG_SYS_SDRAM_CTRL | 4;
-	sdram->ctrl = CONFIG_SYS_SDRAM_CTRL | 4;
+	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
+	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
 
-	sdram->mode = CONFIG_SYS_SDRAM_MODE;
+	out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE);
 
-	sdram->ctrl = (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000F00;
+	out_be32(&sdram->ctrl,
+		(CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000F00);
 
 	udelay(100);