X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Ffreescale%2Fmpc8568mds%2Flaw.c;h=3114e8a173ed4f99fb2f2089fbdcf6d6d84f3b6d;hb=b097d552bc9ee0351bb0c3d1219856e845df59f9;hp=a06ac2a0e140168c31437b040f82d195b09a6f7d;hpb=10795f42cb94e71bcb262b615084f69dd886399a;p=u-boot

diff --git a/board/freescale/mpc8568mds/law.c b/board/freescale/mpc8568mds/law.c
index a06ac2a0e1..3114e8a173 100644
--- a/board/freescale/mpc8568mds/law.c
+++ b/board/freescale/mpc8568mds/law.c
@@ -54,7 +54,7 @@ struct law_entry law_table[] = {
 	SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCIE_1),
 	SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCI),
 	SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCIE_1),
-	SET_LAW(CONFIG_SYS_SRIO_MEM_BUS, LAW_SIZE_512M, LAW_TRGT_IF_RIO),
+	SET_LAW(CONFIG_SYS_SRIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO),
 	/* LBC window - maps 256M.  That's SDRAM, BCSR, PIBs, and Flash */
 	SET_LAW(CONFIG_SYS_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
 };