X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Ffreescale%2Ft102xrdb%2Fspl.c;h=a226d4b5b536f20945d0eacd4be5d9c837711a5c;hb=b460b889e28379014a7f951c08d93a151116b1ad;hp=1a3a996439646ef53e932b3139fe532abea9c0fc;hpb=3b95288a2ae8146ca4915250f815c1218b1706fa;p=u-boot diff --git a/board/freescale/t102xrdb/spl.c b/board/freescale/t102xrdb/spl.c index 1a3a996439..a226d4b5b5 100644 --- a/board/freescale/t102xrdb/spl.c +++ b/board/freescale/t102xrdb/spl.c @@ -1,9 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ /* Copyright 2014 Freescale Semiconductor, Inc. - * - * SPDX-License-Identifier: GPL-2.0+ */ #include +#include +#include #include #include #include @@ -12,6 +13,7 @@ #include #include #include "../common/sleep.h" +#include "../common/spl.h" DECLARE_GLOBAL_DATA_PTR; @@ -30,6 +32,30 @@ unsigned long get_board_ddr_clk(void) return CONFIG_DDR_CLK_FREQ; } +#if defined(CONFIG_SPL_MMC_BOOT) +#define GPIO1_SD_SEL 0x00020000 +int board_mmc_getcd(struct mmc *mmc) +{ + ccsr_gpio_t __iomem *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); + u32 val = in_be32(&pgpio->gpdat); + + /* GPIO1_14, 0: eMMC, 1: SD */ + val &= GPIO1_SD_SEL; + + return val ? -1 : 1; +} + +int board_mmc_getwp(struct mmc *mmc) +{ + ccsr_gpio_t __iomem *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); + u32 val = in_be32(&pgpio->gpdat); + + val &= GPIO1_SD_SEL; + + return val ? -1 : 0; +} +#endif + void board_init_f(ulong bootflag) { u32 plat_ratio, sys_clk, ccb_clk; @@ -78,10 +104,11 @@ void board_init_r(gd_t *gd, ulong dest_addr) bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR; bd->bi_memsize = CONFIG_SYS_L3_SIZE; - probecpu(); + arch_cpu_init(); get_clocks(); mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, CONFIG_SPL_RELOC_MALLOC_SIZE); + gd->flags |= GD_FLG_FULL_MALLOC_INIT; #ifdef CONFIG_SPL_NAND_BOOT nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, @@ -93,21 +120,21 @@ void board_init_r(gd_t *gd, ulong dest_addr) (uchar *)CONFIG_ENV_ADDR); #endif #ifdef CONFIG_SPL_SPI_BOOT - spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, - (uchar *)CONFIG_ENV_ADDR); + fsl_spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, + (uchar *)CONFIG_ENV_ADDR); #endif gd->env_addr = (ulong)(CONFIG_ENV_ADDR); - gd->env_valid = 1; + gd->env_valid = ENV_VALID; i2c_init_all(); - gd->ram_size = initdram(0); + dram_init(); #ifdef CONFIG_SPL_MMC_BOOT mmc_boot(); #elif defined(CONFIG_SPL_SPI_BOOT) - spi_boot(); + fsl_spi_boot(); #elif defined(CONFIG_SPL_NAND_BOOT) nand_boot(); #endif