X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fgdsys%2F405ex%2Fio64.c;h=41fdef7da81bb8919d36150923a0a1add6b3489f;hb=4212657c53f9ed66fd5adc9da9a327e3739646fb;hp=a997571f0ba2de9556689b7188ac0cc9731b3ee1;hpb=797449a16d7f56ce1a7e38e3d85061f933b92c17;p=u-boot diff --git a/board/gdsys/405ex/io64.c b/board/gdsys/405ex/io64.c index a997571f0b..41fdef7da8 100644 --- a/board/gdsys/405ex/io64.c +++ b/board/gdsys/405ex/io64.c @@ -100,7 +100,7 @@ int misc_init_r(void) static void print_fpga_info(unsigned dev) { - ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(dev); + struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(dev); u16 versions = in_le16(&fpga->versions); u16 fpga_version = in_le16(&fpga->fpga_version); u16 fpga_features = in_le16(&fpga->fpga_features); @@ -242,13 +242,14 @@ int last_stage_init(void) { unsigned int k; unsigned int fpga; - ihs_fpga_t *fpga0 = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(0); - ihs_fpga_t *fpga1 = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(1); + struct ihs_fpga *fpga0 = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0); + struct ihs_fpga *fpga1 = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(1); int failed = 0; char str_phys[] = "Setup PHYs -"; char str_serdes[] = "Start SERDES blocks"; char str_channels[] = "Start FPGA channels"; char str_locks[] = "Verify SERDES locks"; + char str_hicb[] = "Verify HICB status"; char str_status[] = "Verify PHY status -"; char slash[] = "\\|/-\\|/-"; @@ -312,6 +313,21 @@ int last_stage_init(void) } blank_string(strlen(str_locks)); + /* verify hicb_status */ + puts(str_hicb); + for (fpga = 0; fpga < 2; ++fpga) { + u16 *ch0_hicb_status_int = &(fpga ? fpga1 : fpga0)->ch0_hicb_status_int; + for (k = 0; k < 32; ++k) { + u16 status = in_le16(ch0_hicb_status_int + 4*k); + if (status) + printf("fpga %d hicb %d: hicb status %04x\n", + fpga, k, status); + /* reset events */ + out_le16(ch0_hicb_status_int + 4*k, status); + } + } + blank_string(strlen(str_hicb)); + /* verify phy status */ puts(str_status); for (k = 0; k < 32; ++k) {