X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fgth2%2Flowlevel_init.S;h=bc31c00531204a4807281b9b28aad53a8ff8ad5f;hb=0cf7d2440e1aa91ca65f1fc08ba309184d376da6;hp=983ff704aca9184687a6a967db422705b81d74a3;hpb=e862ed1c22a9aa79835fc4b5f57b4261196a7fac;p=u-boot

diff --git a/board/gth2/lowlevel_init.S b/board/gth2/lowlevel_init.S
index 983ff704ac..bc31c00531 100644
--- a/board/gth2/lowlevel_init.S
+++ b/board/gth2/lowlevel_init.S
@@ -1,13 +1,12 @@
 /* Memory sub-system initialization code */
 
 #include <config.h>
-#include <version.h>
 #include <asm/regdef.h>
 #include <asm/au1x00.h>
 #include <asm/mipsregs.h>
 
 #define CP0_Config0		$16
-#define MEM_1MS			((CFG_MHZ) * 1000)
+#define MEM_1MS			((CONFIG_SYS_MHZ) * 1000)
 #define GPIO_RJ1LY     (1<<22)
 #define GPIO_CFRESET   (1<<10)
 
@@ -413,7 +412,9 @@ noCacheJump:
 	j clearmem
 	nop
 
+#if 0
 	.globl	memtest
+#endif
 memtest:
 	/* Fill memory with address */
 	li	t0, 0x80000000
@@ -434,7 +435,9 @@ mt1:	lw	t2, 0(t0)
 	bne	t1, zero, mt1
 	nop
 	nop
+#if 0
 	.globl	clearmem
+#endif
 clearmem:
 		/* Clear memory */
 	li	t0, 0x80000000
@@ -446,7 +449,7 @@ mtc:	sw	zero, 0(t0)
 	nop
 	nop
 memtestend:
-	j	ra
+	jr	ra
 	nop
 
 memhang: