X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fgw8260%2Fgw8260.c;h=28f5ca99e87db3d847f404592d11621b090d651f;hb=ec6baf53f7691da4751e98d47a014acf266ab994;hp=7ca19899095dd4229686e5068ae5ad56ad7c0d65;hpb=afd7f3d0de7be71ee90478d4dde00dc1a8f9d204;p=u-boot diff --git a/board/gw8260/gw8260.c b/board/gw8260/gw8260.c index 7ca1989909..28f5ca99e8 100644 --- a/board/gw8260/gw8260.c +++ b/board/gw8260/gw8260.c @@ -212,20 +212,21 @@ const iop_conf_t iop_conf_tab[4][32] = { /* */ /* */ /*********************************************************************/ -int checkboard(void) +int checkboard (void) { - char *str; - puts ("Board: Advent Networks gw8260\n"); + char *str; - str = getenv("serial#"); - if (str != NULL) { - printf("SN: %s\n", str); - } - return 0; + puts ("Board: Advent Networks gw8260\n"); + + str = getenv ("serial#"); + if (str != NULL) { + printf ("SN: %s\n", str); + } + return 0; } -#if defined (CFG_DRAM_TEST) +#if defined (CONFIG_SYS_DRAM_TEST) /*********************************************************************/ /* NAME: move64() - moves a double word (64-bit) */ /* */ @@ -246,30 +247,31 @@ int checkboard(void) /* May cloober fr0. */ /* */ /*********************************************************************/ -static void move64(unsigned long long *src, unsigned long long *dest) +static void move64 (unsigned long long *src, unsigned long long *dest) { - asm ("lfd 0, 0(3)\n\t" /* fpr0 = *scr */ - "stfd 0, 0(4)" /* *dest = fpr0 */ - : : : "fr0" ); /* Clobbers fr0 */ - return; + asm ("lfd 0, 0(3)\n\t" /* fpr0 = *scr */ + "stfd 0, 0(4)" /* *dest = fpr0 */ + : : : "fr0"); /* Clobbers fr0 */ + return; } -#if defined (CFG_DRAM_TEST_DATA) - -unsigned long long pattern[]= { - 0xaaaaaaaaaaaaaaaa, - 0xcccccccccccccccc, - 0xf0f0f0f0f0f0f0f0, - 0xff00ff00ff00ff00, - 0xffff0000ffff0000, - 0xffffffff00000000, - 0x00000000ffffffff, - 0x0000ffff0000ffff, - 0x00ff00ff00ff00ff, - 0x0f0f0f0f0f0f0f0f, - 0x3333333333333333, - 0x5555555555555555}; +#if defined (CONFIG_SYS_DRAM_TEST_DATA) + +unsigned long long pattern[] = { + 0xaaaaaaaaaaaaaaaaULL, + 0xccccccccccccccccULL, + 0xf0f0f0f0f0f0f0f0ULL, + 0xff00ff00ff00ff00ULL, + 0xffff0000ffff0000ULL, + 0xffffffff00000000ULL, + 0x00000000ffffffffULL, + 0x0000ffff0000ffffULL, + 0x00ff00ff00ff00ffULL, + 0x0f0f0f0f0f0f0f0fULL, + 0x3333333333333333ULL, + 0x5555555555555555ULL, +}; /*********************************************************************/ /* NAME: mem_test_data() - test data lines for shorts and opens */ @@ -315,38 +317,38 @@ unsigned long long pattern[]= { /* Assumes only one one SDRAM bank */ /* */ /*********************************************************************/ -int mem_test_data(void) +int mem_test_data (void) { - unsigned long long * pmem = - (unsigned long long *)CFG_SDRAM_BASE ; - unsigned long long temp64; - int num_patterns = sizeof(pattern)/ sizeof(pattern[0]); - int i; - unsigned int hi, lo; - - for ( i = 0; i < num_patterns; i++) { - move64(&(pattern[i]), pmem); - move64(pmem, &temp64); - - /* hi = (temp64>>32) & 0xffffffff; */ - /* lo = temp64 & 0xffffffff; */ - /* printf("\ntemp64 = 0x%08x%08x", hi, lo); */ - - hi = (pattern[i]>>32) & 0xffffffff; - lo = pattern[i] & 0xffffffff; - /* printf("\npattern[%d] = 0x%08x%08x", i, hi, lo); */ - - if (temp64 != pattern[i]){ - printf ("\n Data Test Failed, pattern 0x%08x%08x", hi, lo); - return 1; + unsigned long long *pmem = (unsigned long long *) CONFIG_SYS_SDRAM_BASE; + unsigned long long temp64 = 0; + int num_patterns = sizeof (pattern) / sizeof (pattern[0]); + int i; + unsigned int hi, lo; + + for (i = 0; i < num_patterns; i++) { + move64 (&(pattern[i]), pmem); + move64 (pmem, &temp64); + + /* hi = (temp64>>32) & 0xffffffff; */ + /* lo = temp64 & 0xffffffff; */ + /* printf("\ntemp64 = 0x%08x%08x", hi, lo); */ + + hi = (pattern[i] >> 32) & 0xffffffff; + lo = pattern[i] & 0xffffffff; + /* printf("\npattern[%d] = 0x%08x%08x", i, hi, lo); */ + + if (temp64 != pattern[i]) { + printf ("\n Data Test Failed, pattern 0x%08x%08x", + hi, lo); + return 1; + } } - } - return 0; + return 0; } -#endif /* CFG_DRAM_TEST_DATA */ +#endif /* CONFIG_SYS_DRAM_TEST_DATA */ -#if defined (CFG_DRAM_TEST_ADDRESS) +#if defined (CONFIG_SYS_DRAM_TEST_ADDRESS) /*********************************************************************/ /* NAME: mem_test_address() - test address lines */ /* */ @@ -368,29 +370,30 @@ int mem_test_data(void) /* */ /* */ /*********************************************************************/ -int mem_test_address(void) +int mem_test_address (void) { - volatile unsigned int * pmem = (volatile unsigned int *)CFG_SDRAM_BASE ; - const unsigned int size = (CFG_SDRAM_SIZE * 1024 * 1024)/4; - unsigned int i; - - /* write address to each location */ - for ( i = 0; i < size; i++) { - pmem[i] = i; - } + volatile unsigned int *pmem = + (volatile unsigned int *) CONFIG_SYS_SDRAM_BASE; + const unsigned int size = (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024) / 4; + unsigned int i; + + /* write address to each location */ + for (i = 0; i < size; i++) { + pmem[i] = i; + } - /* verify each loaction */ - for ( i = 0; i < size; i++) { - if (pmem[i] != i) { - printf("\n Address Test Failed at 0x%x", i); - return 1; + /* verify each loaction */ + for (i = 0; i < size; i++) { + if (pmem[i] != i) { + printf ("\n Address Test Failed at 0x%x", i); + return 1; + } } - } - return 0; + return 0; } -#endif /* CFG_DRAM_TEST_ADDRESS */ +#endif /* CONFIG_SYS_DRAM_TEST_ADDRESS */ -#if defined (CFG_DRAM_TEST_WALK) +#if defined (CONFIG_SYS_DRAM_TEST_WALK) /*********************************************************************/ /* NAME: mem_march() - memory march */ /* */ @@ -418,41 +421,37 @@ int mem_test_address(void) /* */ /* */ /*********************************************************************/ -int mem_march(volatile unsigned long long * base, - unsigned int size, - unsigned long long rmask, - unsigned long long wmask, - short read, - short write) +int mem_march (volatile unsigned long long *base, + unsigned int size, + unsigned long long rmask, + unsigned long long wmask, short read, short write) { - unsigned int i; - unsigned long long temp; - unsigned int hitemp, lotemp, himask, lomask; - - for (i = 0 ; i < size ; i++) { - if (read != 0) { - /* temp = base[i]; */ - move64 ((unsigned long long *)&(base[i]), &temp); - if (rmask != temp) { - hitemp = (temp>>32) & 0xffffffff; - lotemp = temp & 0xffffffff; - himask = (rmask>>32) & 0xffffffff; - lomask = rmask & 0xffffffff; - - printf("\n Walking one's test failed: address = 0x%08x," - "\n\texpected 0x%08x%08x, found 0x%08x%08x", - i<<3, himask, lomask, hitemp, lotemp); - return 1; - } - } - if ( write != 0 ) { - /* base[i] = wmask; */ - move64 (&wmask, (unsigned long long *)&(base[i])); + unsigned int i; + unsigned long long temp = 0; + unsigned int hitemp, lotemp, himask, lomask; + + for (i = 0; i < size; i++) { + if (read != 0) { + /* temp = base[i]; */ + move64 ((unsigned long long *) &(base[i]), &temp); + if (rmask != temp) { + hitemp = (temp >> 32) & 0xffffffff; + lotemp = temp & 0xffffffff; + himask = (rmask >> 32) & 0xffffffff; + lomask = rmask & 0xffffffff; + + printf ("\n Walking one's test failed: address = 0x%08x," "\n\texpected 0x%08x%08x, found 0x%08x%08x", i << 3, himask, lomask, hitemp, lotemp); + return 1; + } + } + if (write != 0) { + /* base[i] = wmask; */ + move64 (&wmask, (unsigned long long *) &(base[i])); + } } - } - return 0; + return 0; } -#endif /* CFG_DRAM_TEST_WALK */ +#endif /* CONFIG_SYS_DRAM_TEST_WALK */ /*********************************************************************/ /* NAME: mem_test_walk() - a simple walking ones test */ @@ -480,43 +479,44 @@ int mem_march(volatile unsigned long long * base, /* */ /* */ /*********************************************************************/ -int mem_test_walk(void) +int mem_test_walk (void) { - unsigned long long mask; - volatile unsigned long long * pmem = - (volatile unsigned long long *)CFG_SDRAM_BASE ; - const unsigned long size = (CFG_SDRAM_SIZE * 1024 * 1024)/8; - - unsigned int i; - mask = 0x01; - - printf("Initial Pass"); - mem_march(pmem,size,0x0,0x1,0,1); - - printf("\b\b\b\b\b\b\b\b\b\b\b\b"); - printf(" "); - printf("\b\b\b\b\b\b\b\b\b\b\b\b"); - - for (i = 0 ; i < 63 ; i++) { - printf("Pass %2d", i+2); - if ( mem_march(pmem,size, mask,mask << 1, 1, 1) != 0 ){ - /*printf("mask: 0x%x, pass: %d, ", mask, i);*/ - return 1; + unsigned long long mask; + volatile unsigned long long *pmem = + (volatile unsigned long long *) CONFIG_SYS_SDRAM_BASE; + const unsigned long size = (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024) / 8; + + unsigned int i; + + mask = 0x01; + + printf ("Initial Pass"); + mem_march (pmem, size, 0x0, 0x1, 0, 1); + + printf ("\b\b\b\b\b\b\b\b\b\b\b\b"); + printf (" "); + printf ("\b\b\b\b\b\b\b\b\b\b\b\b"); + + for (i = 0; i < 63; i++) { + printf ("Pass %2d", i + 2); + if (mem_march (pmem, size, mask, mask << 1, 1, 1) != 0) { + /*printf("mask: 0x%x, pass: %d, ", mask, i); */ + return 1; + } + mask = mask << 1; + printf ("\b\b\b\b\b\b\b"); } - mask = mask<<1; - printf("\b\b\b\b\b\b\b"); - } - printf("Last Pass"); - if (mem_march(pmem, size, 0, mask, 0, 1) != 0) { - /* printf("mask: 0x%x", mask); */ - return 1; - } - printf("\b\b\b\b\b\b\b\b\b"); - printf(" "); - printf("\b\b\b\b\b\b\b\b\b"); + printf ("Last Pass"); + if (mem_march (pmem, size, 0, mask, 0, 1) != 0) { + /* printf("mask: 0x%x", mask); */ + return 1; + } + printf ("\b\b\b\b\b\b\b\b\b"); + printf (" "); + printf ("\b\b\b\b\b\b\b\b\b"); - return 0; + return 0; } /*********************************************************************/ @@ -542,49 +542,49 @@ int mem_test_walk(void) /* */ /* */ /*********************************************************************/ -int testdram(void) +int testdram (void) { - char *s; - int rundata, runaddress, runwalk; - - s = getenv ("testdramdata"); - rundata = (s && (*s == 'y')) ? 1 : 0; - s = getenv ("testdramaddress"); - runaddress = (s && (*s == 'y')) ? 1 : 0; - s = getenv ("testdramwalk"); - runwalk = (s && (*s == 'y')) ? 1 : 0; - - if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) { - printf("Testing RAM ... "); - } -#ifdef CFG_DRAM_TEST_DATA - if (rundata == 1) { - if (mem_test_data() == 1){ - return 1; + char *s; + int rundata, runaddress, runwalk; + + s = getenv ("testdramdata"); + rundata = (s && (*s == 'y')) ? 1 : 0; + s = getenv ("testdramaddress"); + runaddress = (s && (*s == 'y')) ? 1 : 0; + s = getenv ("testdramwalk"); + runwalk = (s && (*s == 'y')) ? 1 : 0; + + if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) { + printf ("Testing RAM ... "); + } +#ifdef CONFIG_SYS_DRAM_TEST_DATA + if (rundata == 1) { + if (mem_test_data () == 1) { + return 1; + } } - } #endif -#ifdef CFG_DRAM_TEST_ADDRESS - if (runaddress == 1) { - if (mem_test_address() == 1){ - return 1; +#ifdef CONFIG_SYS_DRAM_TEST_ADDRESS + if (runaddress == 1) { + if (mem_test_address () == 1) { + return 1; + } } - } #endif -#ifdef CFG_DRAM_TEST_WALK - if (runwalk == 1) { - if (mem_test_walk() == 1){ - return 1; +#ifdef CONFIG_SYS_DRAM_TEST_WALK + if (runwalk == 1) { + if (mem_test_walk () == 1) { + return 1; + } } - } #endif - if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) { - printf("passed"); - } - return 0; + if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) { + printf ("passed"); + } + return 0; } -#endif /* CFG_DRAM_TEST */ +#endif /* CONFIG_SYS_DRAM_TEST */ /*********************************************************************/ /* NAME: initdram() - initializes SDRAM controller */ @@ -593,11 +593,11 @@ int testdram(void) /* Initializes the MPC8260's SDRAM controller. */ /* */ /* INPUTS: */ -/* CFG_IMMR - MPC8260 Internal memory map */ -/* CFG_SDRAM_BASE - Physical start address of SDRAM */ -/* CFG_PSDMR - SDRAM mode register */ -/* CFG_MPTPR - Memory refresh timer prescaler register */ -/* CFG_SDRAM0_SIZE - SDRAM size */ +/* CONFIG_SYS_IMMR - MPC8260 Internal memory map */ +/* CONFIG_SYS_SDRAM_BASE - Physical start address of SDRAM */ +/* CONFIG_SYS_PSDMR - SDRAM mode register */ +/* CONFIG_SYS_MPTPR - Memory refresh timer prescaler register */ +/* CONFIG_SYS_SDRAM0_SIZE - SDRAM size */ /* */ /* RETURNS: */ /* SDRAM size in bytes */ @@ -606,52 +606,52 @@ int testdram(void) /* */ /* */ /*********************************************************************/ -long int initdram(int board_type) +phys_size_t initdram (int board_type) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; - volatile memctl8260_t *memctl = &immap->im_memctl; - volatile uchar c = 0, *ramaddr = (uchar *)(CFG_SDRAM_BASE + 0x8); - ulong psdmr = CFG_PSDMR; - int i; - - /* - * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35): - * - * "At system reset, initialization software must set up the - * programmable parameters in the memory controller banks registers - * (ORx, BRx, P/LSDMR). After all memory parameters are configured, - * system software should execute the following initialization sequence - * for each SDRAM device. - * - * 1. Issue a PRECHARGE-ALL-BANKS command - * 2. Issue eight CBR REFRESH commands - * 3. Issue a MODE-SET command to initialize the mode register - * - * The initial commands are executed by setting P/LSDMR[OP] and - * accessing the SDRAM with a single-byte transaction." - * - * The appropriate BRx/ORx registers have already been set when we - * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE. - */ - - memctl->memc_psrt = CFG_PSRT; - memctl->memc_mptpr = CFG_MPTPR; - - memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; - *ramaddr = c; - - memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR; - for (i = 0; i < 8; i++){ + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; + volatile memctl8260_t *memctl = &immap->im_memctl; + volatile uchar c = 0, *ramaddr = (uchar *) (CONFIG_SYS_SDRAM_BASE + 0x8); + ulong psdmr = CONFIG_SYS_PSDMR; + int i; + + /* + * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35): + * + * "At system reset, initialization software must set up the + * programmable parameters in the memory controller banks registers + * (ORx, BRx, P/LSDMR). After all memory parameters are configured, + * system software should execute the following initialization sequence + * for each SDRAM device. + * + * 1. Issue a PRECHARGE-ALL-BANKS command + * 2. Issue eight CBR REFRESH commands + * 3. Issue a MODE-SET command to initialize the mode register + * + * The initial commands are executed by setting P/LSDMR[OP] and + * accessing the SDRAM with a single-byte transaction." + * + * The appropriate BRx/ORx registers have already been set when we + * get here. The SDRAM can be accessed at the address CONFIG_SYS_SDRAM_BASE. + */ + + memctl->memc_psrt = CONFIG_SYS_PSRT; + memctl->memc_mptpr = CONFIG_SYS_MPTPR; + + memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; *ramaddr = c; - } - memctl->memc_psdmr = psdmr | PSDMR_OP_MRW; - *ramaddr = c; - memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN; - *ramaddr = c; + memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR; + for (i = 0; i < 8; i++) { + *ramaddr = c; + } + memctl->memc_psdmr = psdmr | PSDMR_OP_MRW; + *ramaddr = c; + + memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN; + *ramaddr = c; - /* return total ram size */ - return (CFG_SDRAM0_SIZE * 1024 * 1024); + /* return total ram size */ + return (CONFIG_SYS_SDRAM0_SIZE * 1024 * 1024); } /*********************************************************************/