X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fimgtec%2Fmalta%2Fmalta.c;h=495504372a021831be75d4c8a6a7f55d74a0216a;hb=0f832b9cdcbe8a024b53c585622d70129652d20b;hp=72b03ff8cd35e59dfdd9b8b971a000d1ecd6d25d;hpb=ba21a453a58fc02b890f4064b293b1cb09fe7484;p=u-boot diff --git a/board/imgtec/malta/malta.c b/board/imgtec/malta/malta.c index 72b03ff8cd..495504372a 100644 --- a/board/imgtec/malta/malta.c +++ b/board/imgtec/malta/malta.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include @@ -53,8 +52,9 @@ static void malta_lcd_puts(const char *str) static enum core_card malta_core_card(void) { u32 corid, rev; + const void *reg = (const void *)CKSEG1ADDR(MALTA_REVISION); - rev = __raw_readl(CKSEG1ADDR(MALTA_REVISION)); + rev = __raw_readl(reg); corid = (rev & MALTA_REVISION_CORID_MSK) >> MALTA_REVISION_CORID_SHF; switch (corid) { @@ -92,7 +92,7 @@ int checkboard(void) { enum core_card core; - malta_lcd_puts("U-boot"); + malta_lcd_puts("U-Boot"); puts("Board: MIPS Malta"); core = malta_core_card(); @@ -124,28 +124,31 @@ void _machine_restart(void) reset_base = (void __iomem *)CKSEG1ADDR(MALTA_RESET_BASE); __raw_writel(GORESET, reset_base); + mdelay(1000); } int board_early_init_f(void) { - void *io_base; + ulong io_base; /* choose correct PCI I/O base */ switch (malta_sys_con()) { case SYSCON_GT64120: - io_base = (void *)CKSEG1ADDR(MALTA_GT_PCIIO_BASE); + io_base = CKSEG1ADDR(MALTA_GT_PCIIO_BASE); break; case SYSCON_MSC01: - io_base = (void *)CKSEG1ADDR(MALTA_MSC01_PCIIO_BASE); + io_base = CKSEG1ADDR(MALTA_MSC01_PCIIO_BASE); break; default: return -1; } + set_io_port_base(io_base); + /* setup FDC37M817 super I/O controller */ - malta_superio_init(io_base); + malta_superio_init(); return 0; } @@ -157,18 +160,6 @@ int misc_init_r(void) return 0; } -struct serial_device *default_serial_console(void) -{ - switch (malta_sys_con()) { - case SYSCON_GT64120: - return &eserial1_device; - - default: - case SYSCON_MSC01: - return &eserial2_device; - } -} - void pci_init_board(void) { pci_dev_t bdf; @@ -177,8 +168,6 @@ void pci_init_board(void) switch (malta_sys_con()) { case SYSCON_GT64120: - set_io_port_base(CKSEG1ADDR(MALTA_GT_PCIIO_BASE)); - gt64120_pci_init((void *)CKSEG1ADDR(MALTA_GT_BASE), 0x00000000, 0x00000000, CONFIG_SYS_MEM_SIZE, 0x10000000, 0x10000000, 128 * 1024 * 1024, @@ -187,8 +176,6 @@ void pci_init_board(void) default: case SYSCON_MSC01: - set_io_port_base(CKSEG1ADDR(MALTA_MSC01_PCIIO_BASE)); - msc01_pci_init((void *)CKSEG1ADDR(MALTA_MSC01_PCI_BASE), 0x00000000, 0x00000000, CONFIG_SYS_MEM_SIZE, MALTA_MSC01_PCIMEM_MAP,