X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fkeymile%2Fkm_arm%2Fkm_arm.c;h=079509c979d01e3e2996cd2c90336c8e180785dd;hb=f32c86493822174e27f4b3c7c9359094406afbd8;hp=35402c800bd31df15c7162e03a7c327c50878bb7;hpb=9c134e189a95c976dab94d4f28444a5398627188;p=u-boot

diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c
index 35402c800b..079509c979 100644
--- a/board/keymile/km_arm/km_arm.c
+++ b/board/keymile/km_arm/km_arm.c
@@ -20,7 +20,7 @@
 #include <spi.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 
 #include "../common/common.h"
@@ -37,6 +37,27 @@ DECLARE_GLOBAL_DATA_PTR;
 #define REG_IRQ_CIRQ2		0x2d
 #define MASK_RBI_DEFECT_16	0x01
 
+/*
+ * PHY registers definitions
+ */
+#define PHY_MARVELL_OUI					0x5043
+#define PHY_MARVELL_88E1118_MODEL			0x0022
+#define PHY_MARVELL_88E1118R_MODEL			0x0024
+
+#define PHY_MARVELL_PAGE_REG				0x0016
+#define PHY_MARVELL_DEFAULT_PAGE			0x0000
+
+#define PHY_MARVELL_88E1118R_LED_CTRL_PAGE		0x0003
+#define PHY_MARVELL_88E1118R_LED_CTRL_REG		0x0010
+
+#define PHY_MARVELL_88E1118R_LED_CTRL_RESERVED		0x1000
+#define PHY_MARVELL_88E1118R_LED_CTRL_LED0_1000MB	(0x7<<0)
+#define PHY_MARVELL_88E1118R_LED_CTRL_LED1_ACT		(0x3<<4)
+#define PHY_MARVELL_88E1118R_LED_CTRL_LED2_LINK		(0x0<<8)
+
+/* I/O pin to erase flash RGPP09 = MPP43 */
+#define KM_FLASH_ERASE_ENABLE	43
+
 /* Multi-Purpose Pins Functionality configuration */
 static const u32 kwmpp_config[] = {
 	MPP0_NF_IO2,
@@ -102,6 +123,8 @@ static const u32 kwmpp_config[] = {
 	0
 };
 
+static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN];
+
 #if defined(CONFIG_KM_MGCOGE3UN)
 /*
  * Wait for startup OK from mgcoge3ne
@@ -181,8 +204,10 @@ int misc_init_r(void)
 {
 #if defined(CONFIG_KM_MGCOGE3UN)
 	char *wait_for_ne;
+	u8 dip_switch = kw_gpio_get_value(KM_FLASH_ERASE_ENABLE);
 	wait_for_ne = getenv("waitforne");
-	if (wait_for_ne != NULL) {
+
+	if ((wait_for_ne != NULL) && (dip_switch == 0)) {
 		if (strcmp(wait_for_ne, "true") == 0) {
 			int cnt = 0;
 			int abort = 0;
@@ -210,6 +235,8 @@ int misc_init_r(void)
 	}
 #endif
 
+	ivm_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN);
+
 	initialize_unit_leds();
 	set_km_env();
 	set_bootcount_addr();
@@ -222,11 +249,11 @@ int board_early_init_f(void)
 	u32 tmp;
 
 	/* set the 2 bitbang i2c pins as output gpios */
-	tmp = readl(KW_GPIO0_BASE + 4);
-	writel(tmp & (~KM_KIRKWOOD_SOFT_I2C_GPIOS) , KW_GPIO0_BASE + 4);
+	tmp = readl(MVEBU_GPIO0_BASE + 4);
+	writel(tmp & (~KM_KIRKWOOD_SOFT_I2C_GPIOS) , MVEBU_GPIO0_BASE + 4);
 #endif
 	/* adjust SDRAM size for bank 0 */
-	kw_sdram_size_adjust(0);
+	mvebu_sdram_size_adjust(0);
 	kirkwood_mpp_conf(kwmpp_config, NULL);
 	return 0;
 }
@@ -234,7 +261,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
 	/* address of boot parameters */
-	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 
 	/*
 	 * The KM_FLASH_GPIO_PIN switches between using a
@@ -269,9 +296,7 @@ int board_init(void)
 
 int board_late_init(void)
 {
-#if defined(CONFIG_KMCOGE5UN)
-/* I/O pin to erase flash RGPP09 = MPP43 */
-#define KM_FLASH_ERASE_ENABLE	43
+#if (defined(CONFIG_KM_COGE5UN) | defined(CONFIG_KM_MGCOGE3UN))
 	u8 dip_switch = kw_gpio_get_value(KM_FLASH_ERASE_ENABLE);
 
 	/* if pin 1 do full erase */
@@ -405,6 +430,9 @@ void reset_phy(void)
 /* Configure and enable MV88E1118 PHY on the piggy*/
 void reset_phy(void)
 {
+	unsigned int oui;
+	unsigned char model, rev;
+
 	char *name = "egiga0";
 
 	if (miiphy_set_current_dev(name))
@@ -412,6 +440,40 @@ void reset_phy(void)
 
 	/* reset the phy */
 	miiphy_reset(name, CONFIG_PHY_BASE_ADR);
+
+	/* get PHY model */
+	if (miiphy_info(name, CONFIG_PHY_BASE_ADR, &oui, &model, &rev))
+		return;
+
+	/* check for Marvell 88E1118R Gigabit PHY (PIGGY3) */
+	if ((oui == PHY_MARVELL_OUI) &&
+	    (model == PHY_MARVELL_88E1118R_MODEL)) {
+		/* set page register to 3 */
+		if (miiphy_write(name, CONFIG_PHY_BASE_ADR,
+				 PHY_MARVELL_PAGE_REG,
+				 PHY_MARVELL_88E1118R_LED_CTRL_PAGE))
+			printf("Error writing PHY page reg\n");
+
+		/*
+		 * leds setup as printed on PCB:
+		 * LED2 (Link): 0x0 (On Link, Off No Link)
+		 * LED1 (Activity): 0x3 (On Activity, Off No Activity)
+		 * LED0 (Speed): 0x7 (On 1000 MBits, Off Else)
+		 */
+		if (miiphy_write(name, CONFIG_PHY_BASE_ADR,
+				 PHY_MARVELL_88E1118R_LED_CTRL_REG,
+				 PHY_MARVELL_88E1118R_LED_CTRL_RESERVED |
+				 PHY_MARVELL_88E1118R_LED_CTRL_LED0_1000MB |
+				 PHY_MARVELL_88E1118R_LED_CTRL_LED1_ACT |
+				 PHY_MARVELL_88E1118R_LED_CTRL_LED2_LINK))
+			printf("Error writing PHY LED reg\n");
+
+		/* set page register back to 0 */
+		if (miiphy_write(name, CONFIG_PHY_BASE_ADR,
+				 PHY_MARVELL_PAGE_REG,
+				 PHY_MARVELL_DEFAULT_PAGE))
+			printf("Error writing PHY page reg\n");
+	}
 }
 #endif
 
@@ -419,7 +481,7 @@ void reset_phy(void)
 #if defined(CONFIG_HUSH_INIT_VAR)
 int hush_init_var(void)
 {
-	ivm_read_eeprom();
+	ivm_analyze_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN);
 	return 0;
 }
 #endif