X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Flinkstation%2Fide.c;h=541c958fca20aa51a9d4acd83e0ce0d127cb43f6;hb=0f83b36529bbfb297c6a2bf361e3447e2f48ff29;hp=02086a0032537d3b6b4232a5f6df67fb81d326c0;hpb=4b7a6dd89633d60dc4b58476d5ce48247f82a3ca;p=u-boot

diff --git a/board/linkstation/ide.c b/board/linkstation/ide.c
index 02086a0032..541c958fca 100644
--- a/board/linkstation/ide.c
+++ b/board/linkstation/ide.c
@@ -37,7 +37,6 @@
 #define IT8212_PCI_IdeBusSkewCONTROL	0x4c
 #define IT8212_PCI_IdeDrivingCURRENT	0x42
 
-extern ulong ide_bus_offset[CFG_IDE_MAXBUS];
 extern struct pci_controller hose;
 
 int ide_preinit (void)
@@ -47,27 +46,31 @@ int ide_preinit (void)
 	int l;
 
 	status = 1;
-	for (l = 0; l < CFG_IDE_MAXBUS; l++) {
+	for (l = 0; l < CONFIG_SYS_IDE_MAXBUS; l++) {
 		ide_bus_offset[l] = -ATA_STATUS;
 	}
 	devbusfn = pci_find_device(PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_680, 0);
 	if (devbusfn == -1)
 		devbusfn = pci_find_device(PCI_VENDOR_ID_ITE,PCI_DEVICE_ID_ITE_8212,0);
 	if (devbusfn != -1) {
+		u32 ide_bus_offset32;
+
 		status = 0;
 
 		pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0,
-							   (u32 *) &ide_bus_offset[0]);
-		ide_bus_offset[0] &= 0xfffffffe;
+							   &ide_bus_offset32);
+		ide_bus_offset[0] = ide_bus_offset32 & 0xfffffffe;
 		ide_bus_offset[0] = pci_hose_bus_to_phys(&hose,
-							 ide_bus_offset[0] & 0xfffffffe,
-							 PCI_REGION_IO);
-		pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_2,
-				      (u32 *) &ide_bus_offset[1]);
-		ide_bus_offset[1] &= 0xfffffffe;
-		ide_bus_offset[1] = pci_hose_bus_to_phys(&hose,
-							 ide_bus_offset[1] & 0xfffffffe,
-							 PCI_REGION_IO);
+						ide_bus_offset[0] & 0xfffffffe,
+						PCI_REGION_IO);
+		if (CONFIG_SYS_IDE_MAXBUS > 1) {
+			pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_2,
+					      (u32 *) &ide_bus_offset[1]);
+			ide_bus_offset[1] &= 0xfffffffe;
+			ide_bus_offset[1] = pci_hose_bus_to_phys(&hose,
+						ide_bus_offset[1] & 0xfffffffe,
+						PCI_REGION_IO);
+		}
 	}
 
 	if (pci_find_device (PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8212, 0) != -1) {