X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Flinkstation%2Fide.c;h=7b3fe65cffe9dd72e6d9fe5e3baa49ff28a5a1c2;hb=c2120fbfbc4d1f6953228f86be8bdbf38bacfdab;hp=2c89d62f61498323ad6f3e4af234ca28c00ae0bc;hpb=6d0f6bcf337c5261c08fabe12982178c2c489d76;p=u-boot diff --git a/board/linkstation/ide.c b/board/linkstation/ide.c index 2c89d62f61..7b3fe65cff 100644 --- a/board/linkstation/ide.c +++ b/board/linkstation/ide.c @@ -2,24 +2,7 @@ * (C) Copyright 2000 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * + * SPDX-License-Identifier: GPL-2.0+ */ /* ide.c - ide support functions */ @@ -37,7 +20,6 @@ #define IT8212_PCI_IdeBusSkewCONTROL 0x4c #define IT8212_PCI_IdeDrivingCURRENT 0x42 -extern ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS]; extern struct pci_controller hose; int ide_preinit (void) @@ -54,20 +36,24 @@ int ide_preinit (void) if (devbusfn == -1) devbusfn = pci_find_device(PCI_VENDOR_ID_ITE,PCI_DEVICE_ID_ITE_8212,0); if (devbusfn != -1) { + u32 ide_bus_offset32; + status = 0; pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0, - (u32 *) &ide_bus_offset[0]); - ide_bus_offset[0] &= 0xfffffffe; + &ide_bus_offset32); + ide_bus_offset[0] = ide_bus_offset32 & 0xfffffffe; ide_bus_offset[0] = pci_hose_bus_to_phys(&hose, - ide_bus_offset[0] & 0xfffffffe, - PCI_REGION_IO); - pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_2, - (u32 *) &ide_bus_offset[1]); - ide_bus_offset[1] &= 0xfffffffe; - ide_bus_offset[1] = pci_hose_bus_to_phys(&hose, - ide_bus_offset[1] & 0xfffffffe, - PCI_REGION_IO); + ide_bus_offset[0] & 0xfffffffe, + PCI_REGION_IO); + if (CONFIG_SYS_IDE_MAXBUS > 1) { + pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_2, + (u32 *) &ide_bus_offset[1]); + ide_bus_offset[1] &= 0xfffffffe; + ide_bus_offset[1] = pci_hose_bus_to_phys(&hose, + ide_bus_offset[1] & 0xfffffffe, + PCI_REGION_IO); + } } if (pci_find_device (PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8212, 0) != -1) {