X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fmpc8349emds%2Fmpc8349emds.c;h=873bdd01cd66527494f9112d222dbeeea436a8b9;hb=6bd2447ee47ee23c18d2b3c7ccd5a20f7626f5b3;hp=7ece7db7d06950a680fbccaa0c7b5852f3984306;hpb=b86d7622b33892b1dafe761a7a9eaeeab9f3816b;p=u-boot

diff --git a/board/mpc8349emds/mpc8349emds.c b/board/mpc8349emds/mpc8349emds.c
index 7ece7db7d0..873bdd01cd 100644
--- a/board/mpc8349emds/mpc8349emds.c
+++ b/board/mpc8349emds/mpc8349emds.c
@@ -30,12 +30,13 @@
 #include <spd.h>
 #include <miiphy.h>
 #include <command.h>
-#if defined(CONFIG_PCI)
-#include <pci.h>
-#endif
 #if defined(CONFIG_SPD_EEPROM)
 #include <spd_sdram.h>
 #endif
+#if defined(CONFIG_OF_FLAT_TREE)
+#include <ft_build.h>
+#endif
+
 int fixed_sdram(void);
 void sdram_init(void);
 
@@ -50,6 +51,11 @@ int board_early_init_f (void)
 	/* Enable flash write */
 	bcsr[1] &= ~0x01;
 
+#ifdef CFG_USE_MPC834XSYS_USB_PHY
+	/* Use USB PHY on SYS board */
+	bcsr[5] |= 0x02;
+#endif
+
 	return 0;
 }
 
@@ -57,7 +63,7 @@ int board_early_init_f (void)
 
 long int initdram (int board_type)
 {
-	volatile immap_t *im = (immap_t *)CFG_IMMRBAR;
+	volatile immap_t *im = (immap_t *)CFG_IMMR;
 	u32 msize = 0;
 
 	if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im)
@@ -94,7 +100,7 @@ long int initdram (int board_type)
  ************************************************************************/
 int fixed_sdram(void)
 {
-	volatile immap_t *im = (immap_t *)CFG_IMMRBAR;
+	volatile immap_t *im = (immap_t *)CFG_IMMR;
 	u32 msize = 0;
 	u32 ddr_size;
 	u32 ddr_size_log2;
@@ -152,44 +158,6 @@ int checkboard (void)
 	return 0;
 }
 
-#if defined(CONFIG_PCI)
-/*
- * Initialize PCI Devices, report devices found
- */
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_mpc8349emds_config_table[] = {
-	{PCI_ANY_ID,PCI_ANY_ID,PCI_ANY_ID,PCI_ANY_ID,
-	pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
-				    PCI_ENET0_MEMADDR,
-				    PCI_COMMON_MEMORY | PCI_COMMAND_MASTER
-	} },
-	{}
-}
-#endif
-
-volatile static struct pci_controller hose[] = {
-	{
-#ifndef CONFIG_PCI_PNP
-	config_table:pci_mpc8349emds_config_table,
-#endif
-	},
-	{
-#ifndef CONFIG_PCI_PNP
-	config_table:pci_mpc8349emds_config_table,
-#endif
-	}
-};
-#endif /* CONFIG_PCI */
-
-void pci_init_board(void)
-{
-#ifdef CONFIG_PCI
-	extern void pci_mpc83xx_init(volatile struct pci_controller *hose);
-
-	pci_mpc83xx_init(hose);
-#endif /* CONFIG_PCI */
-}
-
 /*
  * if MPC8349EMDS is soldered with SDRAM
  */
@@ -203,8 +171,8 @@ void pci_init_board(void)
 
 void sdram_init(void)
 {
-	volatile immap_t *immap = (immap_t *)CFG_IMMRBAR;
-	volatile lbus8349_t *lbc= &immap->lbus;
+	volatile immap_t *immap = (immap_t *)CFG_IMMR;
+	volatile lbus83xx_t *lbc= &immap->lbus;
 	uint *sdram_addr = (uint *)CFG_LBC_SDRAM_BASE;
 
 	puts("\n   SDRAM on Local Bus: ");
@@ -281,8 +249,8 @@ void sdram_init(void)
  */
 void ecc_print_status(void)
 {
-	volatile immap_t *immap = (immap_t *)CFG_IMMRBAR;
-	volatile ddr8349_t *ddr = &immap->ddr;
+	volatile immap_t *immap = (immap_t *)CFG_IMMR;
+	volatile ddr83xx_t *ddr = &immap->ddr;
 
 	printf("\nECC mode: %s\n\n", (ddr->sdram_cfg & SDRAM_CFG_ECC_EN) ? "ON" : "OFF");
 
@@ -356,8 +324,8 @@ void ecc_print_status(void)
 
 int do_ecc ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
-	volatile immap_t *immap = (immap_t *)CFG_IMMRBAR;
-	volatile ddr8349_t *ddr = &immap->ddr;
+	volatile immap_t *immap = (immap_t *)CFG_IMMR;
+	volatile ddr83xx_t *ddr = &immap->ddr;
 	volatile u32 val;
 	u64 *addr, count, val64;
 	register u64 *i;
@@ -600,3 +568,23 @@ U_BOOT_CMD(
 	"  - re-inits memory"
 );
 #endif /* if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD) */
+
+#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
+void
+ft_board_setup(void *blob, bd_t *bd)
+{
+	u32 *p;
+	int len;
+
+#ifdef CONFIG_PCI
+	ft_pci_setup(blob, bd);
+#endif
+	ft_cpu_setup(blob, bd);
+
+	p = ft_get_prop(blob, "/memory/reg", &len);
+	if (p != NULL) {
+		*p++ = cpu_to_be32(bd->bi_memstart);
+		*p = cpu_to_be32(bd->bi_memsize);
+	}
+}
+#endif