X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fmpl%2Fcommon%2Fpci_parts.h;h=75e8cae6d7fac82f66d50f73378ea59a70d70959;hb=0a6eac842ea288411309cebdc4e72ff59ea6c5ee;hp=4193e9233c9233ee1ec68aa21ca14382925e7add;hpb=5b9c79a81db80c3f9e50c77477957cd803429af8;p=u-boot

diff --git a/board/mpl/common/pci_parts.h b/board/mpl/common/pci_parts.h
index 4193e9233c..75e8cae6d7 100644
--- a/board/mpl/common/pci_parts.h
+++ b/board/mpl/common/pci_parts.h
@@ -91,7 +91,7 @@ static struct pci_pip405_config_entry piix4_isa_bridge_f0[] = {
 static struct pci_pip405_config_entry piix4_ide_cntrl_f1[] = {
 	{PCI_CFG_PIIX4_BMIBA,	0x0001000,	4}, /* set BMI to a valid address */
 	{PCI_COMMAND,		0x0001,		2}, /* enable IO access	*/
-#if !defined(CONFIG_MIP405T)
+#if !defined(CONFIG_TARGET_MIP405T)
 	{PCI_CFG_PIIX4_IDETIM,	0x80008000,	4}, /* enable Both IDE channels	*/
 #else
 	{PCI_CFG_PIIX4_IDETIM,	0x00008000,	4}, /* enable IDE channel0	*/
@@ -101,7 +101,7 @@ static struct pci_pip405_config_entry piix4_ide_cntrl_f1[] = {
 
 /* PIIX4 USB Controller Function 2 */
 static struct pci_pip405_config_entry piix4_usb_cntrl_f2[] = {
-#if !defined(CONFIG_MIP405T)
+#if !defined(CONFIG_TARGET_MIP405T)
 	{PCI_INTERRUPT_LINE,	31,		1}, /* Int vector = 31		*/
 	{PCI_BASE_ADDRESS_4,	0x0000E001,	4}, /* Set IO Address to 0xe000 to 0xe01F */
 	{PCI_LATENCY_TIMER,	0x80,		1}, /* Latency Timer 0x80	*/