X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fmpl%2Fmip405%2Fmip405.c;h=9e8f9bbdd41ab95434d695e511609e869be8c64b;hb=53677ef18e25c97ac613349087c5cb33ae5a2741;hp=84d3e1ed5c15db785719e0be3531437a920c580c;hpb=77ddac9480d63a80b6bb76d7ee4dcc2d1070867e;p=u-boot

diff --git a/board/mpl/mip405/mip405.c b/board/mpl/mip405/mip405.c
index 84d3e1ed5c..9e8f9bbdd4 100644
--- a/board/mpl/mip405/mip405.c
+++ b/board/mpl/mip405/mip405.c
@@ -65,13 +65,13 @@
 #include <common.h>
 #include "mip405.h"
 #include <asm/processor.h>
-#include <405gp_i2c.h>
+#include <4xx_i2c.h>
 #include <miiphy.h>
 #include "../common/common_util.h"
 #include <i2c.h>
 #include <rtc.h>
-extern block_dev_desc_t * scsi_get_dev(int dev);
-extern block_dev_desc_t * ide_get_dev(int dev);
+
+DECLARE_GLOBAL_DATA_PTR;
 
 #undef SDRAM_DEBUG
 #define ENABLE_ECC /* for ecc boards */
@@ -89,12 +89,12 @@ extern ldiv_t ldiv (long int __numer, long int __denom);
 #endif
 
 
-#define PLD_PART_REG 		PER_PLD_ADDR + 0
-#define PLD_VERS_REG 		PER_PLD_ADDR + 1
-#define PLD_BOARD_CFG_REG 	PER_PLD_ADDR + 2
-#define PLD_IRQ_REG 		PER_PLD_ADDR + 3
-#define PLD_COM_MODE_REG 	PER_PLD_ADDR + 4
-#define PLD_EXT_CONF_REG 	PER_PLD_ADDR + 5
+#define PLD_PART_REG		PER_PLD_ADDR + 0
+#define PLD_VERS_REG		PER_PLD_ADDR + 1
+#define PLD_BOARD_CFG_REG	PER_PLD_ADDR + 2
+#define PLD_IRQ_REG		PER_PLD_ADDR + 3
+#define PLD_COM_MODE_REG	PER_PLD_ADDR + 4
+#define PLD_EXT_CONF_REG	PER_PLD_ADDR + 5
 
 #define MEGA_BYTE (1024*1024)
 
@@ -189,8 +189,6 @@ const sdram_t sdram_table[] = {
 void SDRAM_err (const char *s)
 {
 #ifndef SDRAM_DEBUG
-	DECLARE_GLOBAL_DATA_PTR;
-
 	(void) get_clocks ();
 	gd->baudrate = 9600;
 	serial_init ();
@@ -241,8 +239,6 @@ void write_4hex (unsigned long val)
 
 int init_sdram (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	unsigned long	tmp, baseaddr;
 	unsigned short	i;
 	unsigned char	trp_clocks,
@@ -681,7 +677,6 @@ extern flash_info_t flash_info[];	/* info for FLASH chips */
 
 int misc_init_r (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	/* adjust flash start and size as well as the offset */
 	gd->bd->bi_flashstart=0-flash_info[0].size;
 	gd->bd->bi_flashsize=flash_info[0].size-CFG_MONITOR_LEN;
@@ -731,12 +726,12 @@ int last_stage_init (void)
 	char *s;
 	mem_test_reloc();
 	/* write correct LED configuration */
-	if (miiphy_write (0x1, 0x14, 0x2402) != 0) {
+	if (miiphy_write("ppc_4xx_eth0", 0x1, 0x14, 0x2402) != 0) {
 		printf ("Error writing to the PHY\n");
 	}
 	/* since LED/CFG2 is not connected on the -2,
 	 * write to correct capability information */
-	if (miiphy_write (0x1, 0x4, 0x01E1) != 0) {
+	if (miiphy_write("ppc_4xx_eth0", 0x1, 0x4, 0x01E1) != 0) {
 		printf ("Error writing to the PHY\n");
 	}
 	print_mip405_rev ();