X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fmx1ads%2Fmx1ads.c;h=c11c0fe2159e0284d758936354652c55516393b1;hb=807339944419aa238003e6361be2513c719ab26c;hp=ba152e2e886669a50bd7a839a740becb15bf812f;hpb=1a247ba7fa5fb09f56892a09a990f03ce564b3e2;p=u-boot

diff --git a/board/mx1ads/mx1ads.c b/board/mx1ads/mx1ads.c
index ba152e2e88..c11c0fe215 100644
--- a/board/mx1ads/mx1ads.c
+++ b/board/mx1ads/mx1ads.c
@@ -24,6 +24,7 @@
  */
 
 #include <common.h>
+#include <netdev.h>
 /*#include <mc9328.h>*/
 #include <asm/arch/imx-regs.h>
 
@@ -77,7 +78,7 @@ void SetAsynchMode (void)
 
 static u32 mc9328sid;
 
-int board_init (void)
+int board_early_init_f(void)
 {
 	volatile unsigned int tmp;
 
@@ -111,10 +112,6 @@ int board_init (void)
 
 	SetAsynchMode ();
 
-	gd->bd->bi_arch_number = MACH_TYPE_MX1ADS;
-
-	gd->bd->bi_boot_params = 0x08000100;	/* adress of boot parameters    */
-
 	icache_enable ();
 	dcache_enable ();
 
@@ -132,6 +129,15 @@ int board_init (void)
 	return 0;
 }
 
+int board_init(void)
+{
+	gd->bd->bi_arch_number = MACH_TYPE_MX1ADS;
+
+	gd->bd->bi_boot_params = 0x08000100;	/* adress of boot parameters */
+
+	return 0;
+}
+
 int board_late_init (void)
 {
 
@@ -160,10 +166,27 @@ int board_late_init (void)
 	return 0;
 }
 
-int dram_init (void)
+int dram_init(void)
+{
+	/* dram_init must store complete ramsize in gd->ram_size */
+	gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM_1,
+				PHYS_SDRAM_1_SIZE);
+	return 0;
+}
+
+void dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
 
-	return 0;
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+	int rc = 0;
+#ifdef CONFIG_CS8900
+	rc = cs8900_initialize(0, CONFIG_CS8900_BASE);
+#endif
+	return rc;
 }
+#endif