X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fnetta%2Fnetta.c;h=5c935f47a25c3d00ebb126ba1a24366c5fae3b0f;hb=5f4d36825a028e300b7d56a566d2cf84418b7a68;hp=e7024e52d3cc2711385384601fcf3de803a3656d;hpb=79fa88f3ede051ca860667d5397e6cdc7e74a6d0;p=u-boot

diff --git a/board/netta/netta.c b/board/netta/netta.c
index e7024e52d3..5c935f47a2 100644
--- a/board/netta/netta.c
+++ b/board/netta/netta.c
@@ -35,6 +35,11 @@
 #include <watchdog.h>
 #endif
 
+int fec8xx_miiphy_read(char *devname, unsigned char addr,
+		unsigned char  reg, unsigned short *value);
+int fec8xx_miiphy_write(char *devname, unsigned char  addr,
+		unsigned char  reg, unsigned short value);
+
 /****************************************************************/
 
 /* some sane bit macros */
@@ -284,7 +289,7 @@ const uint sdram_table[0x40] = {
 #define MAR_SDRAM_INIT		((CAS_LATENCY << 6) | 0x00000008LU)
 
 /* 8 */
-#define CFG_MAMR	((CFG_MAMR_PTA << MAMR_PTA_SHIFT)  | MAMR_PTAE	    |	\
+#define CONFIG_SYS_MAMR	((CONFIG_SYS_MAMR_PTA << MAMR_PTA_SHIFT)  | MAMR_PTAE	    |	\
 			 MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 |	\
 			 MAMR_RLFA_1X	 | MAMR_WLFA_1X	   | MAMR_TLFA_4X)
 
@@ -332,9 +337,9 @@ void check_ram(unsigned int addr, unsigned int size)
 	}
 }
 
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
 {
-	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
 	volatile memctl8xx_t *memctl = &immap->im_memctl;
 	long int size;
 
@@ -350,10 +355,10 @@ long int initdram(int board_type)
 	/*
 	 * Map controller bank 3 to the SDRAM bank at preliminary address.
 	 */
-	memctl->memc_or3 = CFG_OR3_PRELIM;
-	memctl->memc_br3 = CFG_BR3_PRELIM;
+	memctl->memc_or3 = CONFIG_SYS_OR3_PRELIM;
+	memctl->memc_br3 = CONFIG_SYS_BR3_PRELIM;
 
-	memctl->memc_mbmr = CFG_MAMR & ~MAMR_PTAE;	/* no refresh yet */
+	memctl->memc_mbmr = CONFIG_SYS_MAMR & ~MAMR_PTAE;	/* no refresh yet */
 
 	udelay(200);
 
@@ -431,12 +436,13 @@ void reset_phys(void)
 	mii_init();
 
 	for (phyno = 0; phyno < 32; ++phyno) {
-		miiphy_read(phyno, PHY_PHYIDR1, &v);
+		fec8xx_miiphy_read(NULL, phyno, PHY_PHYIDR1, &v);
 		if (v == 0xFFFF)
 			continue;
-		miiphy_write(phyno, PHY_BMCR, PHY_BMCR_POWD);
+		fec8xx_miiphy_write(NULL, phyno, PHY_BMCR, PHY_BMCR_POWD);
 		udelay(10000);
-		miiphy_write(phyno, PHY_BMCR, PHY_BMCR_RESET | PHY_BMCR_AUTON);
+		fec8xx_miiphy_write(NULL, phyno, PHY_BMCR,
+				PHY_BMCR_RESET | PHY_BMCR_AUTON);
 		udelay(10000);
 	}
 }
@@ -499,7 +505,7 @@ int last_stage_init(void)
 
 int board_early_init_f(void)
 {
-	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
 	volatile iop8xx_t *ioport = &immap->im_ioport;
 	volatile cpm8xx_t *cpm = &immap->im_cpm;
 	volatile memctl8xx_t *memctl = &immap->im_memctl;
@@ -549,22 +555,7 @@ int board_early_init_f(void)
 	return 0;
 }
 
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-
-#include <linux/mtd/nand.h>
-
-extern ulong nand_probe(ulong physadr);
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
-	unsigned long totlen = nand_probe(CFG_NAND_BASE);
-
-	printf ("%4lu MB\n", totlen >> 20);
-}
-#endif
-
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
 
 int pcmcia_init(void)
 {
@@ -573,17 +564,6 @@ int pcmcia_init(void)
 
 #endif
 
-#ifdef CONFIG_POST
-/*
- * Returns 1 if keys pressed to start the power-on long-running tests
- * Called from board_init_f().
- */
-int post_hotkeys_pressed(void)
-{
-	return 0;	/* No hotkeys supported */
-}
-#endif
-
 #ifdef CONFIG_HW_WATCHDOG
 
 void hw_watchdog_reset(void)