X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fpcippc2%2Fpcippc2.c;h=4a91458e8e6a6b2c008d5d095ed08c908579d8b7;hb=6b9408edd3f6af6e91bcc0eebd4aedc0aca28934;hp=a216c55bc6ad149be937e92d0fb4a9a92b0933e3;hpb=9bc97a3d91bf3287b593afa2a5b9e3bb07c9de5c;p=u-boot

diff --git a/board/pcippc2/pcippc2.c b/board/pcippc2/pcippc2.c
index a216c55bc6..4a91458e8e 100644
--- a/board/pcippc2/pcippc2.c
+++ b/board/pcippc2/pcippc2.c
@@ -28,6 +28,7 @@
 #include <linux/mtd/doc2000.h>
 #include <watchdog.h>
 #include <pci.h>
+#include <netdev.h>
 
 #include "hardware.h"
 #include "pcippc2.h"
@@ -63,12 +64,12 @@ u32 pcippc2_sdram_size (void)
 	return in32 (REG (CPC0, RGBAN1));
 }
 
-long initdram (int board_type)
+phys_size_t initdram (int board_type)
 {
 	return cpc710_ram_init ();
 }
 
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	out32 (REG (CPC0, SPOR), 0);
 	iobarrier_rw ();
@@ -146,10 +147,12 @@ void pci_init_board (void)
 	cpc710_pci_enable_timeout ();
 }
 
+#ifdef CONFIG_CMD_DOC
 void doc_init (void)
 {
 	doc_probe (pcippc2_fpga1_phys + HW_FPGA1_DOC);
 }
+#endif
 
 void pcippc2_cpci3264_init (void)
 {
@@ -202,8 +205,8 @@ void watchdog_reset (void)
 		enable_interrupts ();
 }
 
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
-int do_wd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+#if defined(CONFIG_CMD_BSP)
+int do_wd (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	switch (argc) {
 	case 1:
@@ -229,17 +232,21 @@ int do_wd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	default:
 		break;
 	}
-	printf ("Usage:\n%s\n", cmdtp->usage);
-	return 1;
+	return cmd_usage(cmdtp);
 }
 
 U_BOOT_CMD(
 	wd,	2,	1,	do_wd,
-	"wd      - check and set watchdog\n",
+	"check and set watchdog",
 	"on   - switch watchDog on\n"
 	"wd off  - switch watchdog off\n"
-	"wd      - print current status\n"
+	"wd      - print current status"
 );
 
-#endif	/* CFG_CMD_BSP */
+#endif
 #endif	/* CONFIG_WATCHDOG */
+
+int board_eth_init(bd_t *bis)
+{
+	return pci_eth_init(bis);
+}