X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fppmc8260%2Fppmc8260.c;h=bf0188c7e0c3baa8c6a9e27a099ab912ebd376e2;hb=1fed668b3fb9c35932f58af00ff5539239fa4e1d;hp=2b20c26f17478a43e56e108bf95df67b57865813;hpb=77ddac9480d63a80b6bb76d7ee4dcc2d1070867e;p=u-boot

diff --git a/board/ppmc8260/ppmc8260.c b/board/ppmc8260/ppmc8260.c
index 2b20c26f17..bf0188c7e0 100644
--- a/board/ppmc8260/ppmc8260.c
+++ b/board/ppmc8260/ppmc8260.c
@@ -199,16 +199,16 @@ int checkboard (void)
 
 /* ------------------------------------------------------------------------- */
 
-long int initdram (int board_type)
+phys_size_t initdram (int board_type)
 {
-	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
 	volatile memctl8260_t *memctl = &immap->im_memctl;
 	volatile uchar c = 0xff;
-	volatile uchar *ramaddr0 = (uchar *) (CFG_SDRAM0_BASE);
-	volatile uchar *ramaddr1 = (uchar *) (CFG_SDRAM1_BASE);
-	ulong psdmr = CFG_PSDMR;
-	volatile uchar *ramaddr2 = (uchar *) (CFG_SDRAM2_BASE);
-	ulong lsdmr = CFG_LSDMR;
+	volatile uchar *ramaddr0 = (uchar *) (CONFIG_SYS_SDRAM0_BASE);
+	volatile uchar *ramaddr1 = (uchar *) (CONFIG_SYS_SDRAM1_BASE);
+	ulong psdmr = CONFIG_SYS_PSDMR;
+	volatile uchar *ramaddr2 = (uchar *) (CONFIG_SYS_SDRAM2_BASE);
+	ulong lsdmr = CONFIG_SYS_LSDMR;
 	int i;
 
 	/*
@@ -228,13 +228,13 @@ long int initdram (int board_type)
 	 *  accessing the SDRAM with a single-byte transaction."
 	 *
 	 * The appropriate BRx/ORx registers have already been set when we
-	 * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
+	 * get here. The SDRAM can be accessed at the address CONFIG_SYS_SDRAM_BASE.
 	 */
 
-	memctl->memc_psrt = CFG_PSRT;
-	memctl->memc_mptpr = CFG_MPTPR;
+	memctl->memc_psrt = CONFIG_SYS_PSRT;
+	memctl->memc_mptpr = CONFIG_SYS_MPTPR;
 
-#ifndef CFG_RAMBOOT
+#ifndef CONFIG_SYS_RAMBOOT
 	memctl->memc_psdmr = psdmr | PSDMR_OP_PREA;
 	*ramaddr0++ = c;
 	*ramaddr1++ = c;
@@ -246,8 +246,8 @@ long int initdram (int board_type)
 	}
 
 	memctl->memc_psdmr = psdmr | PSDMR_OP_MRW;
-	ramaddr0 = (uchar *) (CFG_SDRAM0_BASE + 0x110);
-	ramaddr1 = (uchar *) (CFG_SDRAM1_BASE + 0x110);
+	ramaddr0 = (uchar *) (CONFIG_SYS_SDRAM0_BASE + 0x110);
+	ramaddr1 = (uchar *) (CONFIG_SYS_SDRAM1_BASE + 0x110);
 	*ramaddr0 = c;
 	*ramaddr1 = c;
 
@@ -271,21 +271,21 @@ long int initdram (int board_type)
 #endif
 
 	/* return total ram size */
-	return ((CFG_SDRAM0_SIZE + CFG_SDRAM1_SIZE) * 1024 * 1024);
+	return ((CONFIG_SYS_SDRAM0_SIZE + CONFIG_SYS_SDRAM1_SIZE) * 1024 * 1024);
 }
 
 #ifdef CONFIG_MISC_INIT_R
 /* ------------------------------------------------------------------------- */
 int misc_init_r (void)
 {
-#ifdef CFG_LED_BASE
-	uchar ds = *(unsigned char *) (CFG_LED_BASE + 1);
+#ifdef CONFIG_SYS_LED_BASE
+	uchar ds = *(unsigned char *) (CONFIG_SYS_LED_BASE + 1);
 	uchar ss;
 	uchar tmp[64];
 	int res;
 
 	if ((ds != 0) && (ds != 0xff)) {
-		res = getenv_r ("ethaddr", (char *)tmp, sizeof (tmp));
+		res = getenv_f("ethaddr", (char *)tmp, sizeof (tmp));
 		if (res > 0) {
 			ss = ((ds >> 4) & 0x0f);
 			ss += ss < 0x0a ? '0' : ('a' - 10);
@@ -298,10 +298,10 @@ int misc_init_r (void)
 			tmp[17] = '\0';
 			setenv ("ethaddr", (char *)tmp);
 			/* set the led to show the address */
-			*((unsigned char *) (CFG_LED_BASE + 1)) = ds;
+			*((unsigned char *) (CONFIG_SYS_LED_BASE + 1)) = ds;
 		}
 	}
-#endif /* CFG_LED_BASE */
+#endif /* CONFIG_SYS_LED_BASE */
 	return (0);
 }
 #endif /* CONFIG_MISC_INIT_R */