X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fprodrive%2Falpr%2Fnand.c;h=097e1837197a2772757510c68aab4e0ff570fd83;hb=ab06bddb04ed4be50a8f9ad5f94fa23953a734e3;hp=20a80983073ba46bb6d13dbca6293d1de5ac72ae;hpb=dfc8a9ee0040e53ada125a3c52f241e37f09cf28;p=u-boot

diff --git a/board/prodrive/alpr/nand.c b/board/prodrive/alpr/nand.c
index 20a8098307..097e183719 100644
--- a/board/prodrive/alpr/nand.c
+++ b/board/prodrive/alpr/nand.c
@@ -26,25 +26,25 @@
 
 #include <common.h>
 
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
 
 #include <asm/processor.h>
 #include <nand.h>
 
 struct alpr_ndfc_regs {
-	u16 cmd[4];
-	u16 addr_wait;
-	u16 term;
-	u16 dummy;
-	u16 dummy2;
-	u16 data;
+	u8 cmd[4];
+	u8 addr_wait;
+	u8 term;
+	u8 dummy;
+	u8 dummy2;
+	u8 data;
 };
 
 static u8 hwctl;
 static struct alpr_ndfc_regs *alpr_ndfc = NULL;
 
-#define readb(addr)	(u8)(*(volatile u16 *)(addr))
-#define writeb(d,addr)	*(volatile u16 *)(addr) = ((u16)(d))
+#define readb(addr)	(u8)(*(volatile u8 *)(addr))
+#define writeb(d,addr)	*(volatile u8 *)(addr) = ((u8)(d))
 
 /*
  * The ALPR has a NAND Flash Controller (NDFC) that handles all accesses to
@@ -154,7 +154,7 @@ static int alpr_nand_dev_ready(struct mtd_info *mtd)
 	return 1;
 }
 
-void board_nand_init(struct nand_chip *nand)
+int board_nand_init(struct nand_chip *nand)
 {
 	alpr_ndfc = (struct alpr_ndfc_regs *)CFG_NAND_BASE;
 
@@ -169,5 +169,7 @@ void board_nand_init(struct nand_chip *nand)
 	nand->read_buf   = alpr_nand_read_buf;
 	nand->verify_buf = alpr_nand_verify_buf;
 	nand->dev_ready  = alpr_nand_dev_ready;
+
+	return 0;
 }
 #endif