X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fronetix%2Fpm9261%2Fpm9261.c;h=79073d8aaaf15191ac430d6dbcb9397fed589712;hb=ad99abe8e721b948db3b6ab1c2cf10f3de5560e9;hp=871b94ada756431b0d106198ed07f0fef10ebfc0;hpb=684cad5717ea5887a09f3c67732a17774a658b34;p=u-boot diff --git a/board/ronetix/pm9261/pm9261.c b/board/ronetix/pm9261/pm9261.c index 871b94ada7..79073d8aaa 100644 --- a/board/ronetix/pm9261/pm9261.c +++ b/board/ronetix/pm9261/pm9261.c @@ -1,35 +1,19 @@ /* * (C) Copyright 2007-2008 - * Stelian Pop + * Stelian Pop * Lead Tech Design * Copyright (C) 2008 Ronetix Ilko Iliev (www.ronetix.at) * Copyright (C) 2009 Jean-Christopher PLAGNIOL-VILLARD * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #include -#include +#include #include +#include #include #include -#include #include #include #include @@ -56,7 +40,6 @@ static void pm9261_nand_hw_init(void) unsigned long csa; struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; /* Enable CS3 */ csa = readl(&matrix->csa) | AT91_MATRIX_CSA_EBI_CS3A; @@ -84,15 +67,14 @@ static void pm9261_nand_hw_init(void) AT91_SMC_MODE_TDF_CYCLE(2), &smc->cs[3].mode); - writel(1 << ATMEL_ID_PIOA | - 1 << ATMEL_ID_PIOC, - &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOA); + at91_periph_clk_enable(ATMEL_ID_PIOC); /* Configure RDY/BSY */ - at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1); + gpio_direction_input(CONFIG_SYS_NAND_READY_PIN); /* Enable NandFlash */ - at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); + gpio_direction_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); at91_set_a_periph(AT91_PIO_PORTC, 0, 0); /* NANDOE */ at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* NANDWE */ @@ -104,7 +86,6 @@ static void pm9261_nand_hw_init(void) static void pm9261_dm9000_hw_init(void) { struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; /* Configure SMC CS2 for DM9000 */ writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | @@ -125,27 +106,27 @@ static void pm9261_dm9000_hw_init(void) &smc->cs[2].mode); /* Configure Interrupt pin as input, no pull-up */ - writel(1 << ATMEL_ID_PIOA, &pmc->pcer); + at91_periph_clk_enable(ATMEL_ID_PIOA); at91_set_pio_input(AT91_PIO_PORTA, 24, 0); } #endif #ifdef CONFIG_LCD vidinfo_t panel_info = { - vl_col: 240, - vl_row: 320, - vl_clk: 4965000, - vl_sync: ATMEL_LCDC_INVLINE_INVERTED | - ATMEL_LCDC_INVFRAME_INVERTED, - vl_bpix: 3, - vl_tft: 1, - vl_hsync_len: 5, - vl_left_margin: 1, - vl_right_margin:33, - vl_vsync_len: 1, - vl_upper_margin:1, - vl_lower_margin:0, - mmio: ATMEL_BASE_LCDC, + .vl_col = 240, + .vl_row = 320, + .vl_clk = 4965000, + .vl_sync = ATMEL_LCDC_INVLINE_INVERTED | + ATMEL_LCDC_INVFRAME_INVERTED, + .vl_bpix = 3, + .vl_tft = 1, + .vl_hsync_len = 5, + .vl_left_margin = 1, + .vl_right_margin = 33, + .vl_vsync_len = 1, + .vl_upper_margin = 1, + .vl_lower_margin = 0, + .mmio = ATMEL_BASE_LCDC, }; void lcd_enable(void) @@ -160,8 +141,6 @@ void lcd_disable(void) static void pm9261_lcd_hw_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - at91_set_a_periph(AT91_PIO_PORTB, 1, 0); /* LCDHSYNC */ at91_set_a_periph(AT91_PIO_PORTB, 2, 0); /* LCDDOTCK */ at91_set_a_periph(AT91_PIO_PORTB, 3, 0); /* LCDDEN */ @@ -185,7 +164,7 @@ static void pm9261_lcd_hw_init(void) at91_set_b_periph(AT91_PIO_PORTB, 27, 0); /* LCDD22 */ at91_set_b_periph(AT91_PIO_PORTB, 28, 0); /* LCDD23 */ - writel(1 << 17, &pmc->scer); /* LCD controller Clock, AT91SAM9261 only */ + at91_system_clk_enable(AT91_PMC_HCK1); gd->fb_base = ATMEL_BASE_SRAM; } @@ -215,7 +194,7 @@ void lcd_show_board_info(void) nand_size = 0; for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) - nand_size += nand_info[i].size; + nand_size += nand_info[i]->size; flash_size = 0; for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) @@ -237,24 +216,24 @@ void lcd_show_board_info(void) #endif /* CONFIG_LCD */ -int board_init(void) +int board_early_init_f(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + at91_periph_clk_enable(ATMEL_ID_PIOA); + at91_periph_clk_enable(ATMEL_ID_PIOC); - /* Enable Ctrlc */ - console_init_f(); + at91_seriald_hw_init(); - writel(1 << ATMEL_ID_PIOA | - 1 << ATMEL_ID_PIOC, - &pmc->pcer); + return 0; +} +int board_init(void) +{ /* arch number of PM9261-Board */ gd->bd->bi_arch_number = MACH_TYPE_PM9261; /* adress of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; - at91_seriald_hw_init(); #ifdef CONFIG_CMD_NAND pm9261_nand_hw_init(); #endif @@ -285,10 +264,12 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM; gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + + return 0; } #ifdef CONFIG_RESET_PHY_R @@ -299,7 +280,7 @@ void reset_phy(void) * Initialize ethernet HW addr prior to starting Linux, * needed for nfsroot */ - eth_init(gd->bd); + eth_init(); #endif } #endif