X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fsbc8641d%2Fsbc8641d.c;h=5c30b2676e4d573b13ea047c27a95a0e04520ef5;hb=e1ccf97c5d7651664d37c0c5aa243874b8851b2d;hp=d954d2f6f74899c191f209248164e0887009aa9f;hpb=b76335178ed399d5843be6bf97707cc9d1b16bbd;p=u-boot

diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c
index d954d2f6f7..5c30b2676e 100644
--- a/board/sbc8641d/sbc8641d.c
+++ b/board/sbc8641d/sbc8641d.c
@@ -35,6 +35,7 @@
 #include <asm/immap_86xx.h>
 #include <asm/fsl_pci.h>
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_serdes.h>
 #include <libfdt.h>
 #include <fdt_support.h>
 
@@ -180,72 +181,11 @@ long int fixed_sdram (void)
  * Initialize PCI Devices, report devices found.
  */
 
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_fsl86xxads_config_table[] = {
-	{PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
-	 PCI_IDSEL_NUMBER, PCI_ANY_ID,
-	 pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
-				     PCI_ENET0_MEMADDR,
-				     PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER}},
-	{}
-};
-#endif
-
-static struct pci_controller pcie1_hose = {
-#ifndef CONFIG_PCI_PNP
-	config_table:pci_mpc86xxcts_config_table
-#endif
-};
-#endif /* CONFIG_PCI */
-
-#ifdef CONFIG_PCIE2
-static struct pci_controller pcie2_hose;
-#endif	/* CONFIG_PCIE2 */
-
-int first_free_busno = 0;
-
 void pci_init_board(void)
 {
-	struct fsl_pci_info pci_info[2];
-	volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
-	volatile ccsr_gur_t *gur = &immap->im_gur;
-	uint devdisr = in_be32(&gur->devdisr);
-	uint io_sel = (gur->pordevsr & MPC8641_PORDEVSR_IO_SEL)
-		>> MPC8641_PORDEVSR_IO_SEL_SHIFT;
-	int pcie_ep;
-	int num = 0;
-
-#ifdef CONFIG_PCIE1
-	int pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
-
-	if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) {
-		SET_STD_PCIE_INFO(pci_info[num], 1);
-		pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
-		printf("    PCIE1 connected as %s (base addr %lx)\n",
-				pcie_ep ? "Endpoint" : "Root Complex",
-				pci_info[num].regs);
-		first_free_busno = fsl_pci_init_port(&pci_info[num++],
-					&pcie1_hose, first_free_busno);
-	} else {
-		puts("    PCIE1: disabled\n");
-	}
-#else
-	puts("    PCIE1: disabled\n");
-#endif /* CONFIG_PCIE1 */
-
-#ifdef CONFIG_PCIE2
-
-	SET_STD_PCIE_INFO(pci_info[num], 2);
-	pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
-	printf("    PCIE2 connected as %s (base addr %lx)\n",
-			pcie_ep ? "Endpoint" : "Root Complex",
-			pci_info[num].regs);
-	first_free_busno = fsl_pci_init_port(&pci_info[num++],
-				&pcie2_hose, first_free_busno);
-#else
-	puts("    PCIE2: disabled\n");
-#endif /* CONFIG_PCIE2 */
+	fsl_pcie_init_board(0);
 }
+#endif /* CONFIG_PCI */
 
 
 #if defined(CONFIG_OF_BOARD_SETUP)