X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fsc520_spunk%2Fu-boot.lds;h=efb570b44b5b9b008f56a166236c1e03538eb0a5;hb=b7659ef2e764f62fc334f0d970721496823e4888;hp=4d6603cb5ec07a56894f96e9a4ec13fe16df4821;hpb=9b827cf1720acda2473afa516956eab6f7cca9a1;p=u-boot

diff --git a/board/sc520_spunk/u-boot.lds b/board/sc520_spunk/u-boot.lds
index 4d6603cb5e..efb570b44b 100644
--- a/board/sc520_spunk/u-boot.lds
+++ b/board/sc520_spunk/u-boot.lds
@@ -32,7 +32,7 @@ SECTIONS
 	.text  : { *(.text); }
 
 	. = ALIGN(4);
-	.rodata : { *(.rodata) }
+	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
 
 	. = 0x400000;	                    /* Ram data segment to use */
 	_i386boot_romdata_dest = ABSOLUTE(.);
@@ -76,7 +76,7 @@ SECTIONS
 	 * The fe00 and ff00 offsets of the start32 and start16
 	 * segments are arbitrary, the just have to be mapped
 	 * at reset and the code have to fit.
-	 * The fff0 offset of reset is important, however.
+	 * The fff0 offset of resetvec is important, however.
 	 */
 
 
@@ -87,6 +87,6 @@ SECTIONS
 	.start16 : AT (0x387fff00) { *(.start16); }
 
 	. = 0xfff0;
-	.reset : AT (0x387ffff0) { *(.reset); }
-	_i386boot_end = (LOADADDR(.reset) + SIZEOF(.reset) );
+	.resetvec : AT (0x387ffff0) { *(.resetvec); }
+	_i386boot_end = (LOADADDR(.resetvec) + SIZEOF(.resetvec) );
 }