X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fsiemens%2Fcommon%2Ffpga.c;h=9d719460dc0f99ea444c8bcaff509d71d96407bc;hb=2242f5369822bc7780db95c47985bb408ea9157b;hp=e9941cda615b9236512cd764dea80d673f50cb81;hpb=038ccac511214b062c56f22b9413f784b86bcd87;p=u-boot diff --git a/board/siemens/common/fpga.c b/board/siemens/common/fpga.c index e9941cda61..9d719460dc 100644 --- a/board/siemens/common/fpga.c +++ b/board/siemens/common/fpga.c @@ -131,45 +131,37 @@ static int fpga_reset (fpga_t* fpga) static int fpga_load (fpga_t* fpga, ulong addr, int checkall) { volatile uchar *fpga_addr = (volatile uchar *)fpga->conf_base; - image_header_t hdr; - ulong len, checksum; - uchar *data = (uchar *)&hdr; - char *s, msg[32]; + image_header_t *hdr = (image_header_t *)addr; + ulong len; + uchar *data; + char msg[32]; int verify, i; /* * Check the image header and data of the net-list */ - memcpy (&hdr, (char *)addr, sizeof(image_header_t)); - - if (hdr.ih_magic != IH_MAGIC) { + if (!image_check_magic (hdr)) { strcpy (msg, "Bad Image Magic Number"); goto failure; } - len = sizeof(image_header_t); - - checksum = hdr.ih_hcrc; - hdr.ih_hcrc = 0; - - if (crc32 (0, data, len) != checksum) { + if (!image_check_hcrc (hdr)) { strcpy (msg, "Bad Image Header CRC"); goto failure; } - data = (uchar*)(addr + sizeof(image_header_t)); - len = hdr.ih_size; + data = (uchar*)image_get_data (hdr); + len = image_get_data_size (hdr); - s = getenv ("verify"); - verify = (s && (*s == 'n')) ? 0 : 1; + verify = getenv_verify (); if (verify) { - if (crc32 (0, data, len) != hdr.ih_dcrc) { + if (!image_check_dcrc (hdr)) { strcpy (msg, "Bad Image Data CRC"); goto failure; } } - if (checkall && fpga_get_version(fpga, (char *)(hdr.ih_name)) < 0) + if (checkall && fpga_get_version(fpga, image_get_name (hdr)) < 0) return 1; /* align length */ @@ -184,7 +176,7 @@ static int fpga_load (fpga_t* fpga, ulong addr, int checkall) goto failure; } - printf ("(%s)... ", hdr.ih_name); + printf ("(%s)... ", image_get_name (hdr)); /* * Copy data to FPGA */ @@ -219,7 +211,7 @@ static int fpga_load (fpga_t* fpga, ulong addr, int checkall) return 1; } -#if (CONFIG_COMMANDS & CFG_CMD_BSP) +#if defined(CONFIG_CMD_BSP) /* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . */ @@ -299,7 +291,7 @@ U_BOOT_CMD( "fpga load [name] addr - load FPGA configuration data\n" ); -#endif /* CONFIG_COMMANDS & CFG_CMD_BSP */ +#endif /* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . */ @@ -341,7 +333,7 @@ int fpga_init (void) } hdr = (image_header_t *)addr; - if ((new_id = fpga_get_version(fpga, (char *)(hdr->ih_name))) == -1) + if ((new_id = fpga_get_version(fpga, image_get_name (hdr))) == -1) return 1; do_load = 1;