X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fsiemens%2Fdraco%2Fmux.c;h=38a484eb4329ed0cc5e1d636770be4564c6703f1;hb=7a9b4359cb7378eebb4b7b4ba49965fc7a2470d8;hp=eaa3c70798ea8e60ecc1c86c87a5d1bc650eb33a;hpb=a26acb7dc946b2fe7fa25736928878f6adf88f46;p=u-boot

diff --git a/board/siemens/draco/mux.c b/board/siemens/draco/mux.c
index eaa3c70798..38a484eb43 100644
--- a/board/siemens/draco/mux.c
+++ b/board/siemens/draco/mux.c
@@ -51,6 +51,7 @@ static struct module_pin_mux nand_pin_mux[] = {
 	{OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */
 	{OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)},	/* NAND_WPN */
 	{OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)},	/* NAND_CS0 */
+	{OFFSET(gpmc_csn1), MODE(0) | PULLUDEN | PULLUP_EN},    /* NAND_CS1 */
 	{OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */
 	{OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)},	/* NAND_OE */
 	{OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)},	/* NAND_WEN */
@@ -60,7 +61,7 @@ static struct module_pin_mux nand_pin_mux[] = {
 
 static struct module_pin_mux gpios_pin_mux[] = {
 	/* DFU button GPIO0_27*/
-	{OFFSET(gpmc_ad11), (MODE(7) | PULLUDEN | RXACTIVE)},
+	{OFFSET(gpmc_ad11), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},
 	{OFFSET(gpmc_csn3), MODE(7) },			/* LED0 GPIO2_0 */
 	{OFFSET(emu0), MODE(7)},			/* LED1 GPIO3_7 */
 	/* Triacs in HW Rev 2 */
@@ -68,7 +69,6 @@ static struct module_pin_mux gpios_pin_mux[] = {
 	{OFFSET(mmc0_dat1), MODE(7) | PULLUDDIS | RXACTIVE},	/* Y3 GPIO2_28*/
 	{OFFSET(mmc0_dat2), MODE(7) | PULLUDDIS | RXACTIVE},	/* Y7 GPIO2_27*/
 	/* Triacs initial HW Rev */
-	{OFFSET(gpmc_csn1), MODE(7) | RXACTIVE | PULLUDDIS},	/* 1_30 Y0 */
 	{OFFSET(gpmc_be1n), MODE(7) | RXACTIVE | PULLUDDIS},	/* 1_28 Y1 */
 	{OFFSET(gpmc_csn2), MODE(7) | RXACTIVE | PULLUDDIS},	/* 1_31 Y2 */
 	{OFFSET(lcd_data15), MODE(7) | RXACTIVE | PULLUDDIS},	/* 0_11 Y3 */
@@ -222,7 +222,7 @@ static struct module_pin_mux gpios_pin_mux[] = {
 	{OFFSET(vrefp), MODE(7) | RXACTIVE | PULLUDDIS},
 	{OFFSET(vrefn), MODE(7) | RXACTIVE | PULLUDDIS},
 	/* nRST for SMSC LAN9303 switch - GPIO2_24 */
-	{OFFSET(lcd_pclk), MODE(7) },			/* LAN9303 nRST */
+	{OFFSET(lcd_pclk), MODE(7) | PULLUDEN | PULLUP_EN }, /* LAN9303 nRST */
 	{-1},
 };