X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fsixnet%2Fsixnet.c;h=a13c72dcd763305bf83add350e75711ce4ef104f;hb=784ab7c545d25288a82216d18e2b0ca3beae470b;hp=798e1855bd4902028b093f4841a1cab29ef7a7fa;hpb=3b3bff4cbf2cb14f9a3e7d03f26ebab900efe4ae;p=u-boot

diff --git a/board/sixnet/sixnet.c b/board/sixnet/sixnet.c
index 798e1855bd..a13c72dcd7 100644
--- a/board/sixnet/sixnet.c
+++ b/board/sixnet/sixnet.c
@@ -33,11 +33,6 @@
 # include <status_led.h>
 #endif
 
-#if defined(CONFIG_CMD_NAND)
-#include <linux/mtd/nand_legacy.h>
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-#endif
-
 DECLARE_GLOBAL_DATA_PTR;
 
 #define ORMASK(size) ((-size) & OR_AM_MSK)
@@ -51,7 +46,7 @@ void show_boot_progress (int status)
 {
 #if defined(CONFIG_STATUS_LED)
 # if defined(STATUS_LED_BOOT)
-	if (status == 15) {
+	if (status == BOOTSTAGE_ID_RUN_OS) {
 		/* ready to transfer to kernel, make sure LED is proper state */
 		status_led_set(STATUS_LED_BOOT, CONFIG_BOOT_LED_STATE);
 	}
@@ -133,7 +128,7 @@ const uint duart_table[] =
 #define FPGA_DONE	0x0080	/* PA8, input, high when FPGA load complete */
 #define FPGA_PROGRAM_L	0x0040	/* PA9, output, low to reset, high to start */
 #define FPGA_INIT_L	0x0020	/* PA10, input, low indicates not ready	*/
-#define fpga (*(volatile unsigned char *)(CFG_FPGA_PROG))	/* FPGA port */
+#define fpga (*(volatile unsigned char *)(CONFIG_SYS_FPGA_PROG))	/* FPGA port */
 
 int board_postclk_init (void)
 {
@@ -143,7 +138,7 @@ int board_postclk_init (void)
 # include "fpgadata.c"
 	};
 
-	volatile immap_t     *immap = (immap_t *)CFG_IMMR;
+	volatile immap_t     *immap = (immap_t *)CONFIG_SYS_IMMR;
 	volatile memctl8xx_t *memctl = &immap->im_memctl;
 #define porta (immap->im_ioport.iop_padat)
 	const unsigned char* pdata;
@@ -247,10 +242,10 @@ int board_postclk_init (void)
 /* ------------------------------------------------------------------------- */
 
 /* base address for SRAM, assume 32-bit port,  valid */
-#define NVRAM_BR_VALUE   (CFG_SRAM_BASE | BR_PS_32 | BR_V)
+#define NVRAM_BR_VALUE   (CONFIG_SYS_SRAM_BASE | BR_PS_32 | BR_V)
 
 /*  up to 64MB - will be adjusted for actual size */
-#define NVRAM_OR_PRELIM  (ORMASK(CFG_SRAM_SIZE) \
+#define NVRAM_OR_PRELIM  (ORMASK(CONFIG_SYS_SRAM_SIZE) \
 	| OR_CSNT_SAM | OR_ACS_DIV4 | OR_BI | OR_SCY_5_CLK | OR_EHTR)
 /*
  * Miscellaneous platform dependent initializations after running in RAM.
@@ -258,12 +253,10 @@ int board_postclk_init (void)
 
 int misc_init_r (void)
 {
-	volatile immap_t     *immap = (immap_t *)CFG_IMMR;
+	volatile immap_t     *immap = (immap_t *)CONFIG_SYS_IMMR;
 	volatile memctl8xx_t *memctl = &immap->im_memctl;
-	char* s;
-	char* e;
-	int reg;
 	bd_t *bd = gd->bd;
+	uchar enetaddr[6];
 
 	memctl->memc_or2 = NVRAM_OR_PRELIM;
 	memctl->memc_br2 = NVRAM_BR_VALUE;
@@ -271,7 +264,7 @@ int misc_init_r (void)
 	/* Is there any SRAM? Is it 16 or 32 bits wide? */
 
 	/* First look for 32-bit SRAM */
-	bd->bi_sramsize = ram_size((ulong*)CFG_SRAM_BASE, CFG_SRAM_SIZE);
+	bd->bi_sramsize = ram_size((ulong*)CONFIG_SYS_SRAM_BASE, CONFIG_SYS_SRAM_SIZE);
 
 	if (bd->bi_sramsize == 0) {
 	    /* no 32-bit SRAM, but there could be 16-bit SRAM since
@@ -279,7 +272,7 @@ int misc_init_r (void)
 	     * Try again with a 16-bit bus.
 	     */
 	    memctl->memc_br2 |= BR_PS_16;
-	    bd->bi_sramsize = ram_size((ulong*)CFG_SRAM_BASE, CFG_SRAM_SIZE);
+	    bd->bi_sramsize = ram_size((ulong*)CONFIG_SYS_SRAM_BASE, CONFIG_SYS_SRAM_SIZE);
 	}
 
 	if (bd->bi_sramsize == 0) {
@@ -288,7 +281,7 @@ int misc_init_r (void)
 	else {
 	    /* adjust or2 for actual size of SRAM */
 	    memctl->memc_or2 |= ORMASK(bd->bi_sramsize);
-	    bd->bi_sramstart = CFG_SRAM_BASE;
+	    bd->bi_sramstart = CONFIG_SYS_SRAM_BASE;
 	    printf("SRAM:  %lu KB\n", bd->bi_sramsize >> 10);
 	}
 
@@ -315,13 +308,9 @@ int misc_init_r (void)
 	 * is present it gets a unique address, otherwise it
 	 * shares the FEC address.
 	 */
-	s = getenv("eth1addr");
-	if (s == NULL)
-		s = getenv("ethaddr");
-	for (reg=0; reg<6; ++reg) {
-		bd->bi_enet1addr[reg] = s ? simple_strtoul(s, &e, 16) : 0;
-		if (s)
-			s = (*e) ? e+1 : e;
+	if (!eth_getenv_enetaddr("eth1addr", enetaddr)) {
+		eth_getenv_enetaddr("ethaddr", enetaddr);
+		eth_setenv_enetaddr("eth1addr", enetaddr);
 	}
 
 	return (0);
@@ -330,7 +319,7 @@ int misc_init_r (void)
 #if defined(CONFIG_CMD_NAND)
 void nand_init(void)
 {
-	unsigned long totlen = nand_probe(CFG_DFLASH_BASE);
+	unsigned long totlen = nand_probe(CONFIG_SYS_DFLASH_BASE);
 
 	printf ("%4lu MB\n", totlen >> 20);
 }
@@ -496,9 +485,9 @@ const uint sdram_table[] =
 
 /* ------------------------------------------------------------------------- */
 
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
 {
-	volatile immap_t     *immap = (immap_t *)CFG_IMMR;
+	volatile immap_t     *immap = (immap_t *)CONFIG_SYS_IMMR;
 	volatile memctl8xx_t *memctl = &immap->im_memctl;
 	uint size_sdram = 0;
 	uint size_sdram9 = 0;