X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fspear%2Fspear300%2Fspear300.c;h=6b6bd9f29d521b79125ef35106e17f2fdd3c304d;hb=93d4334f7f5bc2f0fb580606f0701b2252c6d8d6;hp=60ee54470e4a7480e17dbc6eb2ebaac0bb060af5;hpb=790af6ed08cc3675267191eb60403bd4f0d9a03c;p=u-boot

diff --git a/board/spear/spear300/spear300.c b/board/spear/spear300/spear300.c
old mode 100755
new mode 100644
index 60ee54470e..6b6bd9f29d
--- a/board/spear/spear300/spear300.c
+++ b/board/spear/spear300/spear300.c
@@ -2,32 +2,20 @@
  * (C) Copyright 2009
  * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
+#include <miiphy.h>
+#include <netdev.h>
 #include <nand.h>
 #include <asm/io.h>
+#include <linux/mtd/fsmc_nand.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/spr_defs.h>
 #include <asm/arch/spr_misc.h>
-#include <asm/arch/spr_nand.h>
+
+static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
 
 int board_init(void)
 {
@@ -41,18 +29,32 @@ int board_init(void)
  * Called by nand_init_chip to initialize the board specific functions
  */
 
-int board_nand_init(struct nand_chip *nand)
+void board_nand_init()
 {
 	struct misc_regs *const misc_regs_p =
 	    (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
+	struct nand_chip *nand = &nand_chip[0];
 
+#if defined(CONFIG_NAND_FSMC)
 	if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
 	     MISC_SOCCFG30) ||
 	    ((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
 	     MISC_SOCCFG31)) {
 
-		return spear_nand_init(nand);
+		fsmc_nand_init(nand);
 	}
+#endif
+	return;
+}
+
+int board_eth_init(bd_t *bis)
+{
+	int ret = 0;
 
-	return -1;
+#if defined(CONFIG_DESIGNWARE_ETH)
+	u32 interface = PHY_INTERFACE_MODE_MII;
+	if (designware_initialize(CONFIG_SPEAR_ETHBASE, interface) >= 0)
+		ret++;
+#endif
+	return ret;
 }