X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fti%2Fam57xx%2Fboard.c;h=fd9d20779bef5c5ac11d5109138a56724f05f77f;hb=e8f80a5a58c9b506453cc0780687e8ed457d30a6;hp=1dcc8a3521ed9c47f5f71be66e38ba24c895222e;hpb=376110525edc0ada3e41fab1d09302e20dbe61ba;p=u-boot diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c index 1dcc8a3521..fd9d20779b 100644 --- a/board/ti/am57xx/board.c +++ b/board/ti/am57xx/board.c @@ -1,11 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com * * Author: Felipe Balbi * * Based on board/ti/dra7xx/evm.c - * - * SPDX-License-Identifier: GPL-2.0+ */ #include @@ -30,17 +29,21 @@ #include #include #include +#include #include "../common/board_detect.h" #include "mux_data.h" #define board_is_x15() board_ti_is("BBRDX15_") #define board_is_x15_revb1() (board_ti_is("BBRDX15_") && \ - (strncmp("B.10", board_ti_get_rev(), 3) <= 0)) + !strncmp("B.10", board_ti_get_rev(), 3)) +#define board_is_x15_revc() (board_ti_is("BBRDX15_") && \ + !strncmp("C.00", board_ti_get_rev(), 3)) #define board_is_am572x_evm() board_ti_is("AM572PM_") #define board_is_am572x_evm_reva3() \ (board_ti_is("AM572PM_") && \ - (strncmp("A.30", board_ti_get_rev(), 3) <= 0)) + !strncmp("A.30", board_ti_get_rev(), 3)) +#define board_is_am574x_idk() board_ti_is("AM574IDK") #define board_is_am572x_idk() board_ti_is("AM572IDK") #define board_is_am571x_idk() board_ti_is("AM571IDK") @@ -54,6 +57,19 @@ DECLARE_GLOBAL_DATA_PTR; /* GPIO 7_11 */ #define GPIO_DDR_VTT_EN 203 +/* Touch screen controller to identify the LCD */ +#define OSD_TS_FT_BUS_ADDRESS 0 +#define OSD_TS_FT_CHIP_ADDRESS 0x38 +#define OSD_TS_FT_REG_ID 0xA3 +/* + * Touchscreen IDs for various OSD panels + * Ref: http://www.osddisplays.com/TI/OSD101T2587-53TS_A.1.pdf + */ +/* Used on newer osd101t2587 Panels */ +#define OSD_TS_FT_ID_5x46 0x54 +/* Used on older osd101t2045 Panels */ +#define OSD_TS_FT_ID_5606 0x08 + #define SYSINFO_BOARD_NAME_MAX_LEN 45 #define TPS65903X_PRIMARY_SECONDARY_PAD2 0xFB @@ -73,10 +89,18 @@ static const struct dmm_lisa_map_regs am571x_idk_lisa_regs = { .is_ma_present = 0x1 }; +static const struct dmm_lisa_map_regs am574x_idk_lisa_regs = { + .dmm_lisa_map_2 = 0xc0600200, + .dmm_lisa_map_3 = 0x80600100, + .is_ma_present = 0x1 +}; + void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs) { if (board_is_am571x_idk()) *dmm_lisa_regs = &am571x_idk_lisa_regs; + else if (board_is_am574x_idk()) + *dmm_lisa_regs = &am574x_idk_lisa_regs; else *dmm_lisa_regs = &beagle_x15_lisa_regs; } @@ -208,14 +232,75 @@ static const u32 beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs[] = { 0x0 }; +static const struct emif_regs am571x_emif1_ddr3_666mhz_emif_regs = { + .sdram_config_init = 0x61863332, + .sdram_config = 0x61863332, + .sdram_config2 = 0x08000000, + .ref_ctrl = 0x0000514d, + .ref_ctrl_final = 0x0000144a, + .sdram_tim1 = 0xd333887c, + .sdram_tim2 = 0x30b37fe3, + .sdram_tim3 = 0x409f8ad8, + .read_idle_ctrl = 0x00050000, + .zq_config = 0x5007190b, + .temp_alert_config = 0x00000000, + .emif_ddr_phy_ctlr_1_init = 0x0024400f, + .emif_ddr_phy_ctlr_1 = 0x0e24400f, + .emif_ddr_ext_phy_ctrl_1 = 0x10040100, + .emif_ddr_ext_phy_ctrl_2 = 0x00910091, + .emif_ddr_ext_phy_ctrl_3 = 0x00950095, + .emif_ddr_ext_phy_ctrl_4 = 0x009b009b, + .emif_ddr_ext_phy_ctrl_5 = 0x009e009e, + .emif_rd_wr_lvl_rmp_win = 0x00000000, + .emif_rd_wr_lvl_rmp_ctl = 0x80000000, + .emif_rd_wr_lvl_ctl = 0x00000000, + .emif_rd_wr_exec_thresh = 0x00000305 +}; + +static const struct emif_regs am574x_emif1_ddr3_666mhz_emif_ecc_regs = { + .sdram_config_init = 0x61863332, + .sdram_config = 0x61863332, + .sdram_config2 = 0x08000000, + .ref_ctrl = 0x0000514d, + .ref_ctrl_final = 0x0000144a, + .sdram_tim1 = 0xd333887c, + .sdram_tim2 = 0x30b37fe3, + .sdram_tim3 = 0x409f8ad8, + .read_idle_ctrl = 0x00050000, + .zq_config = 0x5007190b, + .temp_alert_config = 0x00000000, + .emif_ddr_phy_ctlr_1_init = 0x0024400f, + .emif_ddr_phy_ctlr_1 = 0x0e24400f, + .emif_ddr_ext_phy_ctrl_1 = 0x10040100, + .emif_ddr_ext_phy_ctrl_2 = 0x00910091, + .emif_ddr_ext_phy_ctrl_3 = 0x00950095, + .emif_ddr_ext_phy_ctrl_4 = 0x009b009b, + .emif_ddr_ext_phy_ctrl_5 = 0x009e009e, + .emif_rd_wr_lvl_rmp_win = 0x00000000, + .emif_rd_wr_lvl_rmp_ctl = 0x80000000, + .emif_rd_wr_lvl_ctl = 0x00000000, + .emif_rd_wr_exec_thresh = 0x00000305, + .emif_ecc_ctrl_reg = 0xD0000001, + .emif_ecc_address_range_1 = 0x3FFF0000, + .emif_ecc_address_range_2 = 0x00000000 +}; + void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs) { switch (emif_nr) { case 1: - *regs = &beagle_x15_emif1_ddr3_532mhz_emif_regs; + if (board_is_am571x_idk()) + *regs = &am571x_emif1_ddr3_666mhz_emif_regs; + else if (board_is_am574x_idk()) + *regs = &am574x_emif1_ddr3_666mhz_emif_ecc_regs; + else + *regs = &beagle_x15_emif1_ddr3_532mhz_emif_regs; break; case 2: - *regs = &beagle_x15_emif2_ddr3_532mhz_emif_regs; + if (board_is_am574x_idk()) + *regs = &am571x_emif1_ddr3_666mhz_emif_regs; + else + *regs = &beagle_x15_emif2_ddr3_532mhz_emif_regs; break; } } @@ -330,6 +415,54 @@ struct vcores_data am572x_idk_volts = { .iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK, }; +struct vcores_data am571x_idk_volts = { + .mpu.value[OPP_NOM] = VDD_MPU_DRA7_NOM, + .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM, + .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS, + .mpu.addr = TPS659038_REG_ADDR_SMPS12, + .mpu.pmic = &tps659038, + .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK, + + .eve.value[OPP_NOM] = VDD_EVE_DRA7_NOM, + .eve.value[OPP_OD] = VDD_EVE_DRA7_OD, + .eve.value[OPP_HIGH] = VDD_EVE_DRA7_HIGH, + .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM, + .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD, + .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH, + .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS, + .eve.addr = TPS659038_REG_ADDR_SMPS45, + .eve.pmic = &tps659038, + .eve.abb_tx_done_mask = OMAP_ABB_EVE_TXDONE_MASK, + + .gpu.value[OPP_NOM] = VDD_GPU_DRA7_NOM, + .gpu.value[OPP_OD] = VDD_GPU_DRA7_OD, + .gpu.value[OPP_HIGH] = VDD_GPU_DRA7_HIGH, + .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM, + .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD, + .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH, + .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS, + .gpu.addr = TPS659038_REG_ADDR_SMPS6, + .gpu.pmic = &tps659038, + .gpu.abb_tx_done_mask = OMAP_ABB_GPU_TXDONE_MASK, + + .core.value[OPP_NOM] = VDD_CORE_DRA7_NOM, + .core.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_CORE_NOM, + .core.efuse.reg_bits = DRA752_EFUSE_REGBITS, + .core.addr = TPS659038_REG_ADDR_SMPS7, + .core.pmic = &tps659038, + + .iva.value[OPP_NOM] = VDD_IVA_DRA7_NOM, + .iva.value[OPP_OD] = VDD_IVA_DRA7_OD, + .iva.value[OPP_HIGH] = VDD_IVA_DRA7_HIGH, + .iva.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_IVA_NOM, + .iva.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_IVA_OD, + .iva.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_IVA_HIGH, + .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS, + .iva.addr = TPS659038_REG_ADDR_SMPS45, + .iva.pmic = &tps659038, + .iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK, +}; + int get_voltrail_opp(int rail_offset) { int opp; @@ -390,6 +523,8 @@ void do_board_detect(void) bname = "BeagleBoard X15"; else if (board_is_am572x_evm()) bname = "AM572x EVM"; + else if (board_is_am574x_idk()) + bname = "AM574x IDK"; else if (board_is_am572x_idk()) bname = "AM572x IDK"; else if (board_is_am571x_idk()) @@ -413,6 +548,8 @@ static void setup_board_eeprom_env(void) if (board_is_x15()) { if (board_is_x15_revb1()) name = "beagle_x15_revb1"; + else if (board_is_x15_revc()) + name = "beagle_x15_revc"; else name = "beagle_x15"; } else if (board_is_am572x_evm()) { @@ -420,6 +557,8 @@ static void setup_board_eeprom_env(void) name = "am57xx_evm_reva3"; else name = "am57xx_evm"; + } else if (board_is_am574x_idk()) { + name = "am574x_idk"; } else if (board_is_am572x_idk()) { name = "am572x_idk"; } else if (board_is_am571x_idk()) { @@ -437,8 +576,10 @@ invalid_eeprom: void vcores_init(void) { - if (board_is_am572x_idk()) + if (board_is_am572x_idk() || board_is_am574x_idk()) *omap_vcores = &am572x_idk_volts; + else if (board_is_am571x_idk()) + *omap_vcores = &am571x_idk_volts; else *omap_vcores = &beagle_x15_volts; } @@ -446,7 +587,12 @@ void vcores_init(void) void hw_data_init(void) { *prcm = &dra7xx_prcm; - *dplls_data = &dra7xx_dplls; + if (is_dra72x()) + *dplls_data = &dra72x_dplls; + else if (is_dra76x()) + *dplls_data = &dra76x_dplls; + else + *dplls_data = &dra7xx_dplls; *ctrl = &dra7xx_ctrl; } @@ -473,10 +619,64 @@ int board_init(void) return 0; } -int board_late_init(void) +void am57x_idk_lcd_detect(void) { - char *idk_lcd; + int r = -ENODEV; + char *idk_lcd = "no"; + uint8_t buf = 0; + + /* Only valid for IDKs */ + if (board_is_x15() || board_is_am572x_evm()) + return; + + /* Only AM571x IDK has gpio control detect.. so check that */ + if (board_is_am571x_idk() && !am571x_idk_needs_lcd()) + goto out; + + r = i2c_set_bus_num(OSD_TS_FT_BUS_ADDRESS); + if (r) { + printf("%s: Failed to set bus address to %d: %d\n", + __func__, OSD_TS_FT_BUS_ADDRESS, r); + goto out; + } + r = i2c_probe(OSD_TS_FT_CHIP_ADDRESS); + if (r) { + /* AM572x IDK has no explicit settings for optional LCD kit */ + if (board_is_am571x_idk()) { + printf("%s: Touch screen detect failed: %d!\n", + __func__, r); + } + goto out; + } + + /* Read FT ID */ + r = i2c_read(OSD_TS_FT_CHIP_ADDRESS, OSD_TS_FT_REG_ID, 1, &buf, 1); + if (r) { + printf("%s: Touch screen ID read %d:0x%02x[0x%02x] failed:%d\n", + __func__, OSD_TS_FT_BUS_ADDRESS, OSD_TS_FT_CHIP_ADDRESS, + OSD_TS_FT_REG_ID, r); + goto out; + } + + switch (buf) { + case OSD_TS_FT_ID_5606: + idk_lcd = "osd101t2045"; + break; + case OSD_TS_FT_ID_5x46: + idk_lcd = "osd101t2587"; + break; + default: + printf("%s: Unidentifed Touch screen ID 0x%02x\n", + __func__, buf); + /* we will let default be "no lcd" */ + } +out: + env_set("idk_lcd", idk_lcd); + return; +} +int board_late_init(void) +{ setup_board_eeprom_env(); u8 val; @@ -491,7 +691,7 @@ int board_late_init(void) * on HS devices. */ if (get_device_type() == HS_DEVICE) - setenv("boot_fit", "1"); + env_set("boot_fit", "1"); /* * Set the GPIO7 Pad to POWERHOLD. This has higher priority @@ -506,13 +706,9 @@ int board_late_init(void) val); omap_die_id_serial(); + omap_set_fastboot_vars(); - /* TBD: Add LCD panel detection once information is available */ - if (am571x_idk_needs_lcd()) - idk_lcd = "osd101t2045"; /* Default to legacy LCD */ - else - idk_lcd = "no"; - setenv("idk_lcd", idk_lcd); + am57x_idk_lcd_detect(); #if !defined(CONFIG_SPL_BUILD) board_ti_set_ethaddr(2); @@ -531,8 +727,8 @@ void set_muxconf_regs(void) void recalibrate_iodelay(void) { const struct pad_conf_entry *pconf; - const struct iodelay_cfg_entry *iod; - int pconf_sz, iod_sz; + const struct iodelay_cfg_entry *iod, *delta_iod; + int pconf_sz, iod_sz, delta_iod_sz = 0; int ret; if (board_is_am572x_idk()) { @@ -540,6 +736,11 @@ void recalibrate_iodelay(void) pconf_sz = ARRAY_SIZE(core_padconf_array_essential_am572x_idk); iod = iodelay_cfg_array_am572x_idk; iod_sz = ARRAY_SIZE(iodelay_cfg_array_am572x_idk); + } else if (board_is_am574x_idk()) { + pconf = core_padconf_array_essential_am574x_idk; + pconf_sz = ARRAY_SIZE(core_padconf_array_essential_am574x_idk); + iod = iodelay_cfg_array_am574x_idk; + iod_sz = ARRAY_SIZE(iodelay_cfg_array_am574x_idk); } else if (board_is_am571x_idk()) { pconf = core_padconf_array_essential_am571x_idk; pconf_sz = ARRAY_SIZE(core_padconf_array_essential_am571x_idk); @@ -570,7 +771,8 @@ void recalibrate_iodelay(void) /* Now do the weird minor deltas that should be safe */ if (board_is_x15() || board_is_am572x_evm()) { - if (board_is_x15_revb1() || board_is_am572x_evm_reva3()) { + if (board_is_x15_revb1() || board_is_am572x_evm_reva3() || + board_is_x15_revc()) { pconf = core_padconf_array_delta_x15_sr2_0; pconf_sz = ARRAY_SIZE(core_padconf_array_delta_x15_sr2_0); } else { @@ -584,6 +786,9 @@ void recalibrate_iodelay(void) if (am571x_idk_needs_lcd()) { pconf = core_padconf_array_vout_am571x_idk; pconf_sz = ARRAY_SIZE(core_padconf_array_vout_am571x_idk); + delta_iod = iodelay_cfg_array_am571x_idk_4port; + delta_iod_sz = ARRAY_SIZE(iodelay_cfg_array_am571x_idk_4port); + } else { pconf = core_padconf_array_icss1eth_am571x_idk; pconf_sz = ARRAY_SIZE(core_padconf_array_icss1eth_am571x_idk); @@ -593,19 +798,52 @@ void recalibrate_iodelay(void) /* Setup IOdelay configuration */ ret = do_set_iodelay((*ctrl)->iodelay_config_base, iod, iod_sz); + if (delta_iod_sz) + ret = do_set_iodelay((*ctrl)->iodelay_config_base, delta_iod, + delta_iod_sz); + err: /* Closeup.. remove isolation */ __recalibrate_iodelay_end(ret); } #endif -#if defined(CONFIG_GENERIC_MMC) +#if defined(CONFIG_MMC) int board_mmc_init(bd_t *bis) { omap_mmc_init(0, 0, 0, -1, -1); omap_mmc_init(1, 0, 0, -1, -1); return 0; } + +static const struct mmc_platform_fixups am57x_es1_1_mmc1_fixups = { + .hw_rev = "rev11", + .unsupported_caps = MMC_CAP(MMC_HS_200) | + MMC_CAP(UHS_SDR104), + .max_freq = 96000000, +}; + +static const struct mmc_platform_fixups am57x_es1_1_mmc23_fixups = { + .hw_rev = "rev11", + .unsupported_caps = MMC_CAP(MMC_HS_200) | + MMC_CAP(UHS_SDR104) | + MMC_CAP(UHS_SDR50), + .max_freq = 48000000, +}; + +const struct mmc_platform_fixups *platform_fixups_mmc(uint32_t addr) +{ + switch (omap_revision()) { + case DRA752_ES1_0: + case DRA752_ES1_1: + if (addr == OMAP_HSMMC1_BASE) + return &am57x_es1_1_mmc1_fixups; + else + return &am57x_es1_1_mmc23_fixups; + default: + return NULL; + } +} #endif #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_OS_BOOT) @@ -617,8 +855,8 @@ int spl_start_uboot(void) #ifdef CONFIG_SPL_ENV_SUPPORT env_init(); - env_relocate_spec(); - if (getenv_yesno("boot_os") != 1) + env_load(); + if (env_get_yesno("boot_os") != 1) return 1; #endif @@ -808,11 +1046,11 @@ int board_eth_init(bd_t *bis) mac_addr[4] = (mac_lo & 0xFF00) >> 8; mac_addr[5] = mac_lo & 0xFF; - if (!getenv("ethaddr")) { + if (!env_get("ethaddr")) { printf(" not set. Validating first E-fuse MAC\n"); if (is_valid_ethaddr(mac_addr)) - eth_setenv_enetaddr("ethaddr", mac_addr); + eth_env_set_enetaddr("ethaddr", mac_addr); } mac_lo = readl((*ctrl)->control_core_mac_id_1_lo); @@ -824,9 +1062,9 @@ int board_eth_init(bd_t *bis) mac_addr[4] = (mac_lo & 0xFF00) >> 8; mac_addr[5] = mac_lo & 0xFF; - if (!getenv("eth1addr")) { + if (!env_get("eth1addr")) { if (is_valid_ethaddr(mac_addr)) - eth_setenv_enetaddr("eth1addr", mac_addr); + eth_env_set_enetaddr("eth1addr", mac_addr); } ctrl_val = readl((*ctrl)->control_core_control_io1) & (~0x33); @@ -834,7 +1072,8 @@ int board_eth_init(bd_t *bis) writel(ctrl_val, (*ctrl)->control_core_control_io1); /* The phy address for the AM57xx IDK are different than x15 */ - if (board_is_am572x_idk() || board_is_am571x_idk()) { + if (board_is_am572x_idk() || board_is_am571x_idk() || + board_is_am574x_idk()) { cpsw_data.slave_data[0].phy_addr = 0; cpsw_data.slave_data[1].phy_addr = 1; } @@ -861,9 +1100,9 @@ int board_eth_init(bd_t *bis) for (i = 0; i < num_macs; i++) { u64_to_mac(mac1 + i, mac_addr); if (is_valid_ethaddr(mac_addr)) { - eth_setenv_enetaddr_by_index("eth", - i + 2, - mac_addr); + eth_env_set_enetaddr_by_index("eth", + i + 2, + mac_addr); } } } @@ -907,6 +1146,9 @@ int board_fit_config_name_match(const char *name) if (board_is_x15_revb1()) { if (!strcmp(name, "am57xx-beagle-x15-revb1")) return 0; + } else if (board_is_x15_revc()) { + if (!strcmp(name, "am57xx-beagle-x15-revc")) + return 0; } else if (!strcmp(name, "am57xx-beagle-x15")) { return 0; } @@ -915,6 +1157,8 @@ int board_fit_config_name_match(const char *name) return 0; } else if (board_is_am572x_idk() && !strcmp(name, "am572x-idk")) { return 0; + } else if (board_is_am574x_idk() && !strcmp(name, "am574x-idk")) { + return 0; } else if (board_is_am571x_idk() && !strcmp(name, "am571x-idk")) { return 0; }