X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Ftimll%2Fdevkit8000%2Fdevkit8000.c;h=ebff59e70b38b3d7cc595d98ab31100bd7061238;hb=6579d15c58e2b6b051f126ea8b77dd767252aa14;hp=b06aab6176e95a353dfdabb582f317d9e79ae929;hpb=c786f54b9ace5d7b20a0404a7deb1bae683cd4e8;p=u-boot

diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c
index b06aab6176..ebff59e70b 100644
--- a/board/timll/devkit8000/devkit8000.c
+++ b/board/timll/devkit8000/devkit8000.c
@@ -41,6 +41,7 @@
 #include <asm/arch/mem.h>
 #include <asm/mach-types.h>
 #include "devkit8000.h"
+#include <asm/gpio.h>
 #ifdef CONFIG_DRIVER_DM9000
 #include <net.h>
 #include <netdev.h>
@@ -48,6 +49,16 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+static u32 gpmc_net_config[GPMC_MAX_REG] = {
+	NET_GPMC_CONFIG1,
+	NET_GPMC_CONFIG2,
+	NET_GPMC_CONFIG3,
+	NET_GPMC_CONFIG4,
+	NET_GPMC_CONFIG5,
+	NET_GPMC_CONFIG6,
+	0
+};
+
 /*
  * Routine: board_init
  * Description: Early hardware init.
@@ -63,6 +74,13 @@ int board_init(void)
 	return 0;
 }
 
+/* Configure GPMC registers for DM9000 */
+static void gpmc_dm9000_config(void)
+{
+	enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[6],
+		CONFIG_DM9000_BASE, GPMC_SIZE_16M);
+}
+
 /*
  * Routine: misc_init_r
  * Description: Configure board specific parts
@@ -82,13 +100,8 @@ int misc_init_r(void)
 
 #ifdef CONFIG_DRIVER_DM9000
 	/* Configure GPMC registers for DM9000 */
-	writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[6].config1);
-	writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[6].config2);
-	writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[6].config3);
-	writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[6].config4);
-	writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[6].config5);
-	writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[6].config6);
-	writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[6].config7);
+	enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[6],
+			CONFIG_DM9000_BASE, GPMC_SIZE_16M);
 
 	/* Use OMAP DIE_ID as MAC address */
 	if (!eth_getenv_enetaddr("ethaddr", enetaddr)) {
@@ -123,8 +136,7 @@ void set_muxconf_regs(void)
 #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
 int board_mmc_init(bd_t *bis)
 {
-	omap_mmc_init(0);
-	return 0;
+	return omap_mmc_init(0, 0, 0, -1, -1);
 }
 #endif
 
@@ -139,6 +151,35 @@ int board_eth_init(bd_t *bis)
 }
 #endif
 
+#ifdef CONFIG_SPL_OS_BOOT
+/*
+ * Do board specific preperation before SPL
+ * Linux boot
+ */
+void spl_board_prepare_for_linux(void)
+{
+	gpmc_dm9000_config();
+}
+
+/*
+ * devkit8000 specific implementation of spl_start_uboot()
+ *
+ * RETURN
+ * 0 if the button is not pressed
+ * 1 if the button is pressed
+ */
+int spl_start_uboot(void)
+{
+	int val = 0;
+	if (!gpio_request(SPL_OS_BOOT_KEY, "U-Boot key")) {
+		gpio_direction_input(SPL_OS_BOOT_KEY);
+		val = gpio_get_value(SPL_OS_BOOT_KEY);
+		gpio_free(SPL_OS_BOOT_KEY);
+	}
+	return !val;
+}
+#endif
+
 /*
  * Routine: get_board_mem_timings
  * Description: If we use SPL then there is no x-loader nor config header
@@ -146,16 +187,15 @@ int board_eth_init(bd_t *bis)
  * provides the timing values back to the function that configures
  * the memory.  We have either one or two banks of 128MB DDR.
  */
-void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl,
-		u32 *mr)
+void get_board_mem_timings(struct board_sdrc_timings *timings)
 {
 	/* General SDRC config */
-	*mcfg = MICRON_V_MCFG_165(128 << 20);
-	*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
+	timings->mcfg = MICRON_V_MCFG_165(128 << 20);
+	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
 
 	/* AC timings */
-	*ctrla = MICRON_V_ACTIMA_165;
-	*ctrlb = MICRON_V_ACTIMB_165;
+	timings->ctrla = MICRON_V_ACTIMA_165;
+	timings->ctrlb = MICRON_V_ACTIMB_165;
 
-	*mr = MICRON_V_MR_165;
+	timings->mr = MICRON_V_MR_165;
 }