X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Ftrab%2Frs485.c;h=6a3a4cda9ce5e56895f30465799a3e5a9a6647ed;hb=530135dcacac278798346ad5825c03131ce51772;hp=774fd59a49a73740b0c941638527d5441158581d;hpb=f5300ab241898c490231e59229e6312aa862ce52;p=u-boot

diff --git a/board/trab/rs485.c b/board/trab/rs485.c
index 774fd59a49..6a3a4cda9c 100644
--- a/board/trab/rs485.c
+++ b/board/trab/rs485.c
@@ -2,8 +2,8 @@
  * (C) Copyright 2003
  * Martin Krause, TQ-Systems GmbH, <martin.krause@tqs.de>
  *
- * Based on cpu/arm920t/serial.c, by Gary Jennejohn
- * (C) Copyright 2002 Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ * Based on arch/arm/cpu/arm920t/serial.c, by Gary Jennejohn
+ * (C) Copyright 2002 Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -22,7 +22,7 @@
  */
 
 #include <common.h>
-#include <s3c2400.h>
+#include <asm/arch/s3c24x0_cpu.h>
 #include "rs485.h"
 
 static void rs485_setbrg (void);
@@ -42,13 +42,13 @@ static void trab_rs485_disable_rx(void);
 
 static void rs485_setbrg (void)
 {
-	S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR);
+	struct s3c24x0_uart * const uart = s3c24x0_get_base_uart(UART_NR);
 	int i;
 	unsigned int reg = 0;
 
 	/* value is calculated so : (int)(PCLK/16./baudrate) -1 */
-        /* reg = (33000000 / (16 * gd->baudrate)) - 1; */
-        reg = (33000000 / (16 * 38.400)) - 1;
+	/* reg = (33000000 / (16 * gd->baudrate)) - 1; */
+	reg = (33000000 / (16 * 38400)) - 1;
 
 	/* FIFO enable, Tx/Rx FIFO clear */
 	uart->UFCON = 0x07;
@@ -67,18 +67,18 @@ static void rs485_setbrg (void)
 
 static void rs485_cfgio (void)
 {
-        S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+	struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
 
-        gpio->PFCON &= ~(0x3 << 2);
-        gpio->PFCON |=  (0x2 << 2); /* configure GPF1 as RXD1 */
+	gpio->PFCON &= ~(0x3 << 2);
+	gpio->PFCON |=  (0x2 << 2); /* configure GPF1 as RXD1 */
 
-        gpio->PFCON &= ~(0x3 << 6);
-        gpio->PFCON |=  (0x2 << 6); /* configure GPF3 as TXD1 */
+	gpio->PFCON &= ~(0x3 << 6);
+	gpio->PFCON |=  (0x2 << 6); /* configure GPF3 as TXD1 */
 
-        gpio->PFUP |= (1 << 1); /* disable pullup on GPF1 */
-        gpio->PFUP |= (1 << 3); /* disable pullup on GPF3 */
+	gpio->PFUP |= (1 << 1); /* disable pullup on GPF1 */
+	gpio->PFUP |= (1 << 3); /* disable pullup on GPF3 */
 
-        gpio->PACON &= ~(1 << 11); /* set GPA11 (RS485_DE) to output */
+	gpio->PACON &= ~(1 << 11); /* set GPA11 (RS485_DE) to output */
 }
 
 /*
@@ -88,8 +88,8 @@ static void rs485_cfgio (void)
  */
 int rs485_init (void)
 {
-        rs485_cfgio ();
-        rs485_setbrg ();
+	rs485_cfgio ();
+	rs485_setbrg ();
 
 	return (0);
 }
@@ -101,7 +101,7 @@ int rs485_init (void)
  */
 int rs485_getc (void)
 {
-	S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR);
+	struct s3c24x0_uart * const uart = s3c24x0_get_base_uart(UART_NR);
 
 	/* wait for character to arrive */
 	while (!(uart->UTRSTAT & 0x1));
@@ -114,7 +114,7 @@ int rs485_getc (void)
  */
 void rs485_putc (const char c)
 {
-	S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR);
+	struct s3c24x0_uart * const uart = s3c24x0_get_base_uart(UART_NR);
 
 	/* wait for room in the tx FIFO */
 	while (!(uart->UTRSTAT & 0x2));
@@ -131,7 +131,7 @@ void rs485_putc (const char c)
  */
 int rs485_tstc (void)
 {
-	S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR);
+	struct s3c24x0_uart * const uart = s3c24x0_get_base_uart(UART_NR);
 
 	return uart->UTRSTAT & 0x1;
 }
@@ -168,13 +168,13 @@ static void set_rs485re(unsigned char rs485re_state)
 
 static void set_rs485de(unsigned char rs485de_state)
 {
-        S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+	struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
 
-        /* This is on PORT A bit 11 */
-        if(rs485de_state)
-                gpio->PADAT |= (1 << 11);
-        else
-                gpio->PADAT &= ~(1 << 11);
+	/* This is on PORT A bit 11 */
+	if(rs485de_state)
+		gpio->PADAT |= (1 << 11);
+	else
+		gpio->PADAT &= ~(1 << 11);
 }