X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fv38b%2Fv38b.c;h=ec032eef8ded81c90a539de5e3608c7c10f49232;hb=d39b57415838c73fb0a37eca84de3c68ba990586;hp=dede996880124cc2053fc86c01a6b66fb36256ae;hpb=0a8eb59983047ae3bcc0babf3ee4d10d01abe7da;p=u-boot

diff --git a/board/v38b/v38b.c b/board/v38b/v38b.c
index dede996880..ec032eef8d 100644
--- a/board/v38b/v38b.c
+++ b/board/v38b/v38b.c
@@ -191,16 +191,8 @@ int checkboard (void)
 	return 0;
 }
 
-
-int board_early_init_r(void)
+int board_early_init_f(void)
 {
-	/*
-	 * Now, when we are in RAM, enable flash write access for the
-	 * detection process.  Note that CS_BOOT cannot be cleared when
-	 * executing in flash.
-	 */
-	*(vu_long *) MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
-
 #ifdef CONFIG_HW_WATCHDOG
 	/*
 	 * Enable and configure the direction (output) of PSC3_9 - watchdog
@@ -210,6 +202,17 @@ int board_early_init_r(void)
 	*(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC3_9;
 	*(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC3_9;
 #endif /* CONFIG_HW_WATCHDOG */
+	return 0;
+}
+
+int board_early_init_r(void)
+{
+	/*
+	 * Now, when we are in RAM, enable flash write access for the
+	 * detection process.  Note that CS_BOOT cannot be cleared when
+	 * executing in flash.
+	 */
+	*(vu_long *) MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
 
 	/*
 	 * Enable GPIO_WKUP_7 to "read the status of the actual power
@@ -221,7 +224,7 @@ int board_early_init_r(void)
 }
 
 
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET)
 void init_ide_reset(void)
 {
 	debug("init_ide_reset\n");
@@ -245,7 +248,7 @@ void ide_set_reset(int idereset)
 	} else
 		*(vu_long *) MPC5XXX_WU_GPIO_DATA_O |=  GPIO_PSC1_4;
 }
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
+#endif
 
 
 #ifdef CONFIG_HW_WATCHDOG