X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fw7o%2Fw7o.c;h=4392779163d70458862f6c2ccc51847c28be19f6;hb=5368c55d4ca463405225dd184ecabf370b715c05;hp=6479beeb13bb612cc7cd1f1384ff0e6a55327610;hpb=d1c3b27525b664e8c4db6bb173eed51bfc8220de;p=u-boot diff --git a/board/w7o/w7o.c b/board/w7o/w7o.c index 6479beeb13..4392779163 100644 --- a/board/w7o/w7o.c +++ b/board/w7o/w7o.c @@ -33,13 +33,6 @@ unsigned long get_dram_size (void); void sdram_init(void); -/* - * Macros to transform values - * into environment strings. - */ -#define XMK_STR(x) #x -#define MK_STR(x) XMK_STR(x) - /* ------------------------------------------------------------------------- */ int board_early_init_f (void) @@ -64,16 +57,16 @@ int board_early_init_f (void) * IRQ 30 (EXT IRQ 5) Level One PHY; active low; level sensitive * IRQ 31 (EXT IRQ 6) SAM 1; active high; level sensitive */ - mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ - mtdcr (uicer, 0x00000000); /* disable all ints */ + mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */ + mtdcr (UIC0ER, 0x00000000); /* disable all ints */ - mtdcr (uiccr, 0x00000000); /* set all to be non-critical */ - mtdcr (uicpr, 0xFFFFFF80); /* set int polarities */ - mtdcr (uictr, 0x10000000); /* set int trigger levels */ - mtdcr (uicvcr, 0x00000001); /* set vect base=0, + mtdcr (UIC0CR, 0x00000000); /* set all to be non-critical */ + mtdcr (UIC0PR, 0xFFFFFF80); /* set int polarities */ + mtdcr (UIC0TR, 0x10000000); /* set int trigger levels */ + mtdcr (UIC0VCR, 0x00000001); /* set vect base=0, INT0 highest priority */ - mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ + mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */ #elif defined(CONFIG_W7OLMC) /* @@ -95,16 +88,16 @@ int board_early_init_f (void) * IRQ 30 (EXT IRQ 5) RCMM Reset; active low; level sensitive * IRQ 31 (EXT IRQ 6) PHY; active high; level sensitive */ - mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ - mtdcr (uicer, 0x00000000); /* disable all ints */ + mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */ + mtdcr (UIC0ER, 0x00000000); /* disable all ints */ - mtdcr (uiccr, 0x00000000); /* set all to be non-critical */ - mtdcr (uicpr, 0xFFFFFF80); /* set int polarities */ - mtdcr (uictr, 0x10000000); /* set int trigger levels */ - mtdcr (uicvcr, 0x00000001); /* set vect base=0, + mtdcr (UIC0CR, 0x00000000); /* set all to be non-critical */ + mtdcr (UIC0PR, 0xFFFFFF80); /* set int polarities */ + mtdcr (UIC0TR, 0x10000000); /* set int trigger levels */ + mtdcr (UIC0VCR, 0x00000001); /* set vect base=0, INT0 highest priority */ - mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ + mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */ #else /* Unknown */ # error "Unknown W7O board configuration" @@ -157,7 +150,7 @@ phys_size_t initdram (int board_type) /* * ToDo: Move the asm init routine sdram_init() to this C file, * or even better use some common ppc4xx code available - * in cpu/ppc4xx + * in arch/powerpc/cpu/ppc4xx */ sdram_init(); @@ -170,16 +163,16 @@ unsigned long get_dram_size (void) int size = 0; /* Get bank Size registers */ - mtdcr (SDRAM0_CFGADDR, mem_mb0cf); /* get bank 0 config reg */ + mtdcr (SDRAM0_CFGADDR, SDRAM0_B0CR); /* get bank 0 config reg */ regs[0] = mfdcr (SDRAM0_CFGDATA); - mtdcr (SDRAM0_CFGADDR, mem_mb1cf); /* get bank 1 config reg */ + mtdcr (SDRAM0_CFGADDR, SDRAM0_B1CR); /* get bank 1 config reg */ regs[1] = mfdcr (SDRAM0_CFGDATA); - mtdcr (SDRAM0_CFGADDR, mem_mb2cf); /* get bank 2 config reg */ + mtdcr (SDRAM0_CFGADDR, SDRAM0_B2CR); /* get bank 2 config reg */ regs[2] = mfdcr (SDRAM0_CFGDATA); - mtdcr (SDRAM0_CFGADDR, mem_mb3cf); /* get bank 3 config reg */ + mtdcr (SDRAM0_CFGADDR, SDRAM0_B3CR); /* get bank 3 config reg */ regs[3] = mfdcr (SDRAM0_CFGDATA); /* compute the size, add each bank if enabled */ @@ -228,7 +221,7 @@ static void w7o_env_init (VPD * vpd) /* Set 'ethaddr' envvar if 'ethaddr' envvar is the default */ eth = (char *)(vpd->ethAddrs[0]); if (ethaddr - && (strcmp (ethaddr, MK_STR (CONFIG_ETHADDR)) == 0)) { + && (strcmp(ethaddr, __stringify(CONFIG_ETHADDR)) == 0)) { /* Now setup ethaddr */ sprintf (buf, "%02x:%02x:%02x:%02x:%02x:%02x", eth[0], eth[1], eth[2], eth[3], eth[4],