X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=board%2Fw7o%2Fw7o.h;h=d1fed028c3ce2b614a14ded0fdfb85299b1b5031;hb=f47b048b3a283dca63cfdce46840dd477e591336;hp=84581664e81191c2ff45b49f8e366205ffa7f489;hpb=8bde7f776c77b343aca29b8c7b58464d915ac245;p=u-boot diff --git a/board/w7o/w7o.h b/board/w7o/w7o.h index 84581664e8..d1fed028c3 100644 --- a/board/w7o/w7o.h +++ b/board/w7o/w7o.h @@ -25,14 +25,11 @@ #define _W7O_H_ #include -/* IBM 405GP PowerPC GPIO registers */ -#define IBM405GP_GPIO0_OR 0xef600700L /* GPIO Output */ -#define IBM405GP_GPIO0_TCR 0xef600704L /* GPIO Three-State Control */ -#define IBM405GP_GPIO0_ODR 0xef600718L /* GPIO Open Drain */ -#define IBM405GP_GPIO0_IR 0xef60071cL /* GPIO Input */ - -/* IBM 405GP DCRs */ -#define CPC0_CR0 0xb1 /* Chip control register 0 */ +/* AMCC 405GP PowerPC GPIO registers */ +#define PPC405GP_GPIO0_OR 0xef600700L /* GPIO Output */ +#define PPC405GP_GPIO0_TCR 0xef600704L /* GPIO Three-State Control */ +#define PPC405GP_GPIO0_ODR 0xef600718L /* GPIO Open Drain */ +#define PPC405GP_GPIO0_IR 0xef60071cL /* GPIO Input */ /* LMG FPGA <=> CPU GPIO signals */ #define LMG_XCV_INIT 0x10000000L