X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=cfg%2Fpce.cfg;h=77f8c5c97989eed73f053d9de6d64f7d06c54187;hb=a76dcdc4193f566bc7f8a3e14dd26d0ed0951074;hp=adb420f32bf70285f3ad12e8f7bcda21c11fe468;hpb=21d7729ad1d35c8d917699c846beb89718db7529;p=cc65

diff --git a/cfg/pce.cfg b/cfg/pce.cfg
index adb420f32..77f8c5c97 100644
--- a/cfg/pce.cfg
+++ b/cfg/pce.cfg
@@ -1,45 +1,41 @@
-# linker config to produce simple NEC PC-Engine cartridge (.pce)
-
+# linker config. to produce a NEC PC-Engine 8K, 16K, or 32K image (.bin)
 SYMBOLS {
-        __STACKSIZE__: type = weak, value = $0300; # 3 pages stack
+    __CARTSIZE__:  type = weak, value = $2000; # $2000, $4000, or $8000
+    __STACKSIZE__: type = weak, value = $0300; # 3 pages stack
 }
-
 MEMORY {
-        # FIXME: is this correct? the first 3? bytes cant be used?
-        ZP:  start = $03, size = $1A, type = rw, define = yes;
-
-        # reset-bank and hardware vectors
-        ROM0: start = $e000, size = $1ff6, file = %O ,fill = yes, define = yes;
-        ROMV: start = $fff6, size = $a, file = %O,fill = yes;
-
-        # first RAM page (also contains stack and zeropage)
-        RAM: start = $2200, size = $1e00, define = yes;
+    ZP:   file = "", start =  $0000,                size = $0100,                 define = yes;
+    # RAM bank
+    MAIN: file = "", start =  $2200,                size = $1E00 - __STACKSIZE__, define = yes;
+    # ROM banks, before swapping, and after mapping
+    ROM:  file = %O, start = $10000 - __CARTSIZE__, size = __CARTSIZE__, fill = yes, fillval = $FF;
 }
-
 SEGMENTS {
-        STARTUP: load = ROM0, type = ro, define = yes;
-        INIT:    load = ROM0, type = ro, define = yes, optional = yes;
-        CODE:    load = ROM0, type = ro, define = yes;
-        RODATA:  load = ROM0, type = ro, define = yes;
-        DATA:    load = ROM0, run= RAM, type = rw, define = yes;
-        BSS:     load = RAM, type = bss, define = yes;
-        VECTORS: load = ROMV, type = rw, define = yes;
-        ZEROPAGE: load = ZP, type = zp, define = yes;
+    ZEROPAGE: load = ZP,              type = zp;
+    EXTZP:    load = ZP,              type = zp,  optional = yes;
+    APPZP:    load = ZP,              type = zp,  optional = yes;
+    DATA:     load = ROM, run = MAIN, type = rw,                  define = yes;
+    INIT:     load = MAIN,            type = bss, optional = yes;
+    BSS:      load = MAIN,            type = bss,                 define = yes;
+    RODATA:   load = ROM,             type = ro;
+    CODE:     load = ROM,             type = ro;
+    LOWCODE:  load = ROM,             type = ro,  optional = yes;
+    ONCE:     load = ROM,             type = ro,  optional = yes;
+    STARTUP:  load = ROM,             type = ro,  start = $FFF6 - $0066;
+    VECTORS:  load = ROM,             type = ro,  start = $FFF6;
 }
-
 FEATURES {
     CONDES: type    = constructor,
             label   = __CONSTRUCTOR_TABLE__,
             count   = __CONSTRUCTOR_COUNT__,
-            segment = INIT;
+            segment = ONCE;
     CONDES: type    = destructor,
             label   = __DESTRUCTOR_TABLE__,
             count   = __DESTRUCTOR_COUNT__,
             segment = RODATA;
-# FIXME: interruptor support is missing
-#    CONDES: type    = interruptor,
-#            label   = __INTERRUPTOR_TABLE__,
-#            count   = __INTERRUPTOR_COUNT__,
-#            segment = RODATA,
-#            import  = __CALLIRQ__;
+    CONDES: type    = interruptor,
+            label   = __INTERRUPTOR_TABLE__,
+            count   = __INTERRUPTOR_COUNT__,
+            segment = RODATA,
+            import  = __CALLIRQ__;
 }