X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=common%2Fboard_r.c;h=bf6c72572d7a07b0dbfb60a40fd48ea61b194bc7;hb=4e389366e8a2c0f635bb7bf35a2386019518bbbd;hp=f0b4f9d935181f905745fdb526dd666a8d5b517a;hpb=c722f0b026249385bbbcec4f5be9bd3abd69342c;p=u-boot diff --git a/common/board_r.c b/common/board_r.c index f0b4f9d935..bf6c72572d 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -33,6 +33,7 @@ #endif #include #include +#include #ifdef CONFIG_BITBANGMII #include #endif @@ -55,6 +56,9 @@ #include #include #include +#ifdef CONFIG_AVR32 +#include +#endif DECLARE_GLOBAL_DATA_PTR; @@ -164,14 +168,17 @@ static int initr_serial(void) return 0; } -#ifdef CONFIG_PPC +#if defined(CONFIG_PPC) || defined(CONFIG_M68K) static int initr_trap(void) { /* * Setup trap handlers */ +#if defined(CONFIG_PPC) trap_init(gd->relocaddr); - +#else + trap_init(CONFIG_SYS_SDRAM_BASE); +#endif return 0; } #endif @@ -224,7 +231,9 @@ static int initr_unlock_ram_in_cache(void) #ifdef CONFIG_PCI static int initr_pci(void) { +#ifndef CONFIG_DM_PCI pci_init(); +#endif return 0; } @@ -471,17 +480,6 @@ static int initr_malloc_bootparams(void) } #endif -#ifdef CONFIG_SC3 -/* TODO: with new initcalls, move this into the driver */ -extern void sc3_read_eeprom(void); - -static int initr_sc3_read_eeprom(void) -{ - sc3_read_eeprom(); - return 0; -} -#endif - static int initr_jumptable(void) { jumptable_init(); @@ -498,7 +496,7 @@ static int initr_api(void) #endif /* enable exceptions */ -#ifdef CONFIG_ARM +#if defined(CONFIG_ARM) || defined(CONFIG_AVR32) static int initr_enable_interrupts(void) { enable_interrupts(); @@ -581,7 +579,7 @@ static int initr_bbmii(void) static int initr_net(void) { puts("Net: "); - eth_initialize(gd->bd); + eth_initialize(); #if defined(CONFIG_RESET_PHY_R) debug("Reset Ethernet PHY\n"); reset_phy(); @@ -693,6 +691,12 @@ init_fnc_t init_sequence_r[] = { /* TODO: could x86/PPC have this also perhaps? */ #ifdef CONFIG_ARM initr_caches, + /* Note: For Freescale LS2 SoCs, new MMU table is created in DDR. + * A temporary mapping of IFC high region is since removed, + * so environmental variables in NOR flash is not availble + * until board_init() is called below to remap IFC to high + * region. + */ #endif initr_reloc_global_data, #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500) @@ -726,7 +730,7 @@ init_fnc_t init_sequence_r[] = { #ifdef CONFIG_NEEDS_MANUAL_RELOC initr_manual_reloc_cmdtable, #endif -#ifdef CONFIG_PPC +#if defined(CONFIG_PPC) || defined(CONFIG_M68K) initr_trap, #endif #ifdef CONFIG_ADDR_MAP @@ -764,16 +768,13 @@ init_fnc_t init_sequence_r[] = { initr_flash, #endif INIT_FUNC_WATCHDOG_RESET -#if defined(CONFIG_PPC) +#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_X86) /* initialize higher level parts of CPU like time base and timers */ cpu_init_r, #endif #ifdef CONFIG_PPC initr_spi, #endif -#if defined(CONFIG_X86) && defined(CONFIG_SPI) - init_func_spi, -#endif #ifdef CONFIG_CMD_NAND initr_nand, #endif @@ -792,9 +793,6 @@ init_fnc_t init_sequence_r[] = { #endif INIT_FUNC_WATCHDOG_RESET initr_secondary_cpu, -#ifdef CONFIG_SC3 - initr_sc3_read_eeprom, -#endif #if defined(CONFIG_ID_EEPROM) || defined(CONFIG_SYS_I2C_MAC_OFFSET) mac_read_from_eeprom, #endif @@ -825,10 +823,11 @@ init_fnc_t init_sequence_r[] = { initr_kgdb, #endif interrupt_init, -#if defined(CONFIG_ARM) +#if defined(CONFIG_ARM) || defined(CONFIG_AVR32) initr_enable_interrupts, #endif -#if defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) +#if defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) \ + || defined(CONFIG_M68K) timer_init, /* initialize timer */ #endif #if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT) @@ -893,6 +892,10 @@ void board_init_r(gd_t *new_gd, ulong dest_addr) int i; #endif +#ifdef CONFIG_AVR32 + mmu_init_r(dest_addr); +#endif + #if !defined(CONFIG_X86) && !defined(CONFIG_ARM) && !defined(CONFIG_ARM64) gd = new_gd; #endif