X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=common%2Fboard_r.c;h=c4fd3eaf8cc1834a1292c79062340847a006f681;hb=b810aa1dd1b2c7facf47ca607cd780ec7976fd16;hp=4fcd4f6a7057e3ba8afeb985869f358718fa7c66;hpb=e1cc4d31f889428a4ca73120951389c756404184;p=u-boot diff --git a/common/board_r.c b/common/board_r.c index 4fcd4f6a70..c4fd3eaf8c 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -33,6 +33,7 @@ #endif #include #include +#include #ifdef CONFIG_BITBANGMII #include #endif @@ -131,6 +132,8 @@ static int initr_reloc_global_data(void) { #ifdef __ARM__ monitor_flash_len = _end - __image_copy_start; +#elif defined(CONFIG_NDS32) + monitor_flash_len = (ulong)&_end - (ulong)&_start; #elif !defined(CONFIG_SANDBOX) && !defined(CONFIG_NIOS2) monitor_flash_len = (ulong)&__init_end - gd->relocaddr; #endif @@ -167,14 +170,17 @@ static int initr_serial(void) return 0; } -#ifdef CONFIG_PPC +#if defined(CONFIG_PPC) || defined(CONFIG_M68K) static int initr_trap(void) { /* * Setup trap handlers */ +#if defined(CONFIG_PPC) trap_init(gd->relocaddr); - +#else + trap_init(CONFIG_SYS_SDRAM_BASE); +#endif return 0; } #endif @@ -227,7 +233,9 @@ static int initr_unlock_ram_in_cache(void) #ifdef CONFIG_PCI static int initr_pci(void) { +#ifndef CONFIG_DM_PCI pci_init(); +#endif return 0; } @@ -282,6 +290,9 @@ static int initr_dm(void) /* Save the pre-reloc driver model and start a new one */ gd->dm_root_f = gd->dm_root; gd->dm_root = NULL; +#ifdef CONFIG_TIMER + gd->timer = NULL; +#endif return dm_init_and_scan(false); } #endif @@ -438,6 +449,9 @@ static int initr_env(void) env_relocate(); else set_default_env(NULL); +#ifdef CONFIG_OF_CONTROL + setenv_addr("fdtcontroladdr", gd->fdt_blob); +#endif /* Initialize from environment */ load_addr = getenv_ulong("loadaddr", 16, load_addr); @@ -474,17 +488,6 @@ static int initr_malloc_bootparams(void) } #endif -#ifdef CONFIG_SC3 -/* TODO: with new initcalls, move this into the driver */ -extern void sc3_read_eeprom(void); - -static int initr_sc3_read_eeprom(void) -{ - sc3_read_eeprom(); - return 0; -} -#endif - static int initr_jumptable(void) { jumptable_init(); @@ -544,11 +547,14 @@ static int initr_kgdb(void) } #endif -#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT) +#if defined(CONFIG_STATUS_LED) static int initr_status_led(void) { +#if defined(STATUS_LED_BOOT) status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING); - +#else + status_led_init(); +#endif return 0; } #endif @@ -584,7 +590,7 @@ static int initr_bbmii(void) static int initr_net(void) { puts("Net: "); - eth_initialize(gd->bd); + eth_initialize(); #if defined(CONFIG_RESET_PHY_R) debug("Reset Ethernet PHY\n"); reset_phy(); @@ -696,6 +702,12 @@ init_fnc_t init_sequence_r[] = { /* TODO: could x86/PPC have this also perhaps? */ #ifdef CONFIG_ARM initr_caches, + /* Note: For Freescale LS2 SoCs, new MMU table is created in DDR. + * A temporary mapping of IFC high region is since removed, + * so environmental variables in NOR flash is not availble + * until board_init() is called below to remap IFC to high + * region. + */ #endif initr_reloc_global_data, #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500) @@ -710,7 +722,7 @@ init_fnc_t init_sequence_r[] = { #ifdef CONFIG_DM initr_dm, #endif -#ifdef CONFIG_ARM +#if defined(CONFIG_ARM) || defined(CONFIG_NDS32) board_init, /* Setup chipselects */ #endif /* @@ -729,7 +741,7 @@ init_fnc_t init_sequence_r[] = { #ifdef CONFIG_NEEDS_MANUAL_RELOC initr_manual_reloc_cmdtable, #endif -#ifdef CONFIG_PPC +#if defined(CONFIG_PPC) || defined(CONFIG_M68K) initr_trap, #endif #ifdef CONFIG_ADDR_MAP @@ -767,16 +779,13 @@ init_fnc_t init_sequence_r[] = { initr_flash, #endif INIT_FUNC_WATCHDOG_RESET -#if defined(CONFIG_PPC) +#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_X86) /* initialize higher level parts of CPU like time base and timers */ cpu_init_r, #endif #ifdef CONFIG_PPC initr_spi, #endif -#if defined(CONFIG_X86) && defined(CONFIG_SPI) - init_func_spi, -#endif #ifdef CONFIG_CMD_NAND initr_nand, #endif @@ -795,9 +804,6 @@ init_fnc_t init_sequence_r[] = { #endif INIT_FUNC_WATCHDOG_RESET initr_secondary_cpu, -#ifdef CONFIG_SC3 - initr_sc3_read_eeprom, -#endif #if defined(CONFIG_ID_EEPROM) || defined(CONFIG_SYS_I2C_MAC_OFFSET) mac_read_from_eeprom, #endif @@ -831,10 +837,11 @@ init_fnc_t init_sequence_r[] = { #if defined(CONFIG_ARM) || defined(CONFIG_AVR32) initr_enable_interrupts, #endif -#if defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) +#if defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) \ + || defined(CONFIG_M68K) timer_init, /* initialize timer */ #endif -#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT) +#if defined(CONFIG_STATUS_LED) initr_status_led, #endif /* PPC has a udelay(20) here dating from 2002. Why? */