X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=common%2Fcmd_cache.c;h=9778d3bd3bc331af551acbfa0004e367b0c2b62d;hb=34d34b88b6b3d947de86dae81574bdde85b8d01e;hp=5cdd8341f287045a9e0c610c7525b568283b42f5;hpb=ac956293befb265b8958654d08c4ad52e605d46e;p=u-boot diff --git a/common/cmd_cache.c b/common/cmd_cache.c index 5cdd8341f2..9778d3bd3b 100644 --- a/common/cmd_cache.c +++ b/common/cmd_cache.c @@ -26,18 +26,27 @@ */ #include #include +#include -static int on_off (const char *); +static int parse_argv(const char *); + +void __weak flush_icache(void) +{ + /* please define arch specific flush_icache */ + puts("No arch specific flush_icache available!\n"); +} int do_icache ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { switch (argc) { case 2: /* on / off */ - switch (on_off(argv[1])) { + switch (parse_argv(argv[1])) { case 0: icache_disable(); break; case 1: icache_enable (); break; + case 2: flush_icache(); + break; } /* FALL TROUGH */ case 1: /* get status */ @@ -50,15 +59,23 @@ int do_icache ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return 0; } +void __weak flush_dcache(void) +{ + puts("No arch specific flush_dcache available!\n"); + /* please define arch specific flush_dcache */ +} + int do_dcache ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { switch (argc) { case 2: /* on / off */ - switch (on_off(argv[1])) { + switch (parse_argv(argv[1])) { case 0: dcache_disable(); break; case 1: dcache_enable (); break; + case 2: flush_dcache(); + break; } /* FALL TROUGH */ case 1: /* get status */ @@ -72,9 +89,11 @@ int do_dcache ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) } -static int on_off (const char *s) +static int parse_argv(const char *s) { - if (strcmp(s, "on") == 0) { + if (strcmp(s, "flush") == 0) { + return (2); + } else if (strcmp(s, "on") == 0) { return (1); } else if (strcmp(s, "off") == 0) { return (0); @@ -86,13 +105,13 @@ static int on_off (const char *s) U_BOOT_CMD( icache, 2, 1, do_icache, "enable or disable instruction cache", - "[on, off]\n" - " - enable or disable instruction cache" + "[on, off, flush]\n" + " - enable, disable, or flush instruction cache" ); U_BOOT_CMD( dcache, 2, 1, do_dcache, "enable or disable data cache", - "[on, off]\n" - " - enable or disable data (writethrough) cache" + "[on, off, flush]\n" + " - enable, disable, or flush data (writethrough) cache" );