X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=common%2Fcmd_fpga.c;h=010cd24e63dc21f86f0ae1910a4c4fac9d0e20e4;hb=32d7cdd366a1516fa498464c261851f3a76a62ef;hp=f3579bb7eb995721b1ee7b551fbdc5351ca715ca;hpb=fc598412ced94e01d4bbe8769b2a114ff6ac6f2a;p=u-boot

diff --git a/common/cmd_fpga.c b/common/cmd_fpga.c
index f3579bb7eb..010cd24e63 100644
--- a/common/cmd_fpga.c
+++ b/common/cmd_fpga.c
@@ -2,24 +2,7 @@
  * (C) Copyright 2000, 2001
  * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 /*
@@ -27,9 +10,6 @@
  */
 #include <common.h>
 #include <command.h>
-#if defined(CONFIG_CMD_NET)
-#include <net.h>
-#endif
 #include <fpga.h>
 #include <malloc.h>
 
@@ -44,100 +24,6 @@ static int fpga_get_op(char *opstr);
 #define FPGA_DUMP   3
 #define FPGA_LOADMK 4
 
-/* Convert bitstream data and load into the fpga */
-int fpga_loadbitstream(unsigned long dev, char *fpgadata, size_t size)
-{
-#if defined(CONFIG_FPGA_XILINX)
-	unsigned int length;
-	unsigned int swapsize;
-	char buffer[80];
-	unsigned char *dataptr;
-	unsigned int i;
-	int rc;
-
-	dataptr = (unsigned char *)fpgadata;
-
-	/* skip the first bytes of the bitsteam, their meaning is unknown */
-	length = (*dataptr << 8) + *(dataptr + 1);
-	dataptr += 2;
-	dataptr += length;
-
-	/* get design name (identifier, length, string) */
-	length = (*dataptr << 8) + *(dataptr + 1);
-	dataptr += 2;
-	if (*dataptr++ != 0x61) {
-		debug("%s: Design name id not recognized in bitstream\n",
-		      __func__);
-		return FPGA_FAIL;
-	}
-
-	length = (*dataptr << 8) + *(dataptr + 1);
-	dataptr += 2;
-	for (i = 0; i < length; i++)
-		buffer[i] = *dataptr++;
-
-	printf("  design filename = \"%s\"\n", buffer);
-
-	/* get part number (identifier, length, string) */
-	if (*dataptr++ != 0x62) {
-		printf("%s: Part number id not recognized in bitstream\n",
-		       __func__);
-		return FPGA_FAIL;
-	}
-
-	length = (*dataptr << 8) + *(dataptr + 1);
-	dataptr += 2;
-	for (i = 0; i < length; i++)
-		buffer[i] = *dataptr++;
-	printf("  part number = \"%s\"\n", buffer);
-
-	/* get date (identifier, length, string) */
-	if (*dataptr++ != 0x63) {
-		printf("%s: Date identifier not recognized in bitstream\n",
-		       __func__);
-		return FPGA_FAIL;
-	}
-
-	length = (*dataptr << 8) + *(dataptr+1);
-	dataptr += 2;
-	for (i = 0; i < length; i++)
-		buffer[i] = *dataptr++;
-	printf("  date = \"%s\"\n", buffer);
-
-	/* get time (identifier, length, string) */
-	if (*dataptr++ != 0x64) {
-		printf("%s: Time identifier not recognized in bitstream\n",
-		       __func__);
-		return FPGA_FAIL;
-	}
-
-	length = (*dataptr << 8) + *(dataptr+1);
-	dataptr += 2;
-	for (i = 0; i < length; i++)
-		buffer[i] = *dataptr++;
-	printf("  time = \"%s\"\n", buffer);
-
-	/* get fpga data length (identifier, length) */
-	if (*dataptr++ != 0x65) {
-		printf("%s: Data length id not recognized in bitstream\n",
-		       __func__);
-		return FPGA_FAIL;
-	}
-	swapsize = ((unsigned int) *dataptr << 24) +
-		   ((unsigned int) *(dataptr + 1) << 16) +
-		   ((unsigned int) *(dataptr + 2) << 8) +
-		   ((unsigned int) *(dataptr + 3));
-	dataptr += 4;
-	printf("  bytes in bitstream = %d\n", swapsize);
-
-	rc = fpga_load(dev, dataptr, swapsize);
-	return rc;
-#else
-	printf("Bitstream support only for Xilinx devices\n");
-	return FPGA_FAIL;
-#endif
-}
-
 /* ------------------------------------------------------------------------- */
 /* command form:
  *   fpga <op> <device number> <data addr> <datasize>
@@ -274,9 +160,25 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 				image_header_t *hdr =
 						(image_header_t *)fpga_data;
 				ulong data;
-
-				data = (ulong)image_get_data(hdr);
-				data_size = image_get_data_size(hdr);
+				uint8_t comp;
+
+				comp = image_get_comp(hdr);
+				if (comp == IH_COMP_GZIP) {
+					ulong image_buf = image_get_data(hdr);
+					data = image_get_load(hdr);
+					ulong image_size = ~0UL;
+
+					if (gunzip((void *)data, ~0UL,
+						   (void *)image_buf,
+						   &image_size) != 0) {
+						puts("GUNZIP: error\n");
+						return 1;
+					}
+					data_size = image_size;
+				} else {
+					data = (ulong)image_get_data(hdr);
+					data_size = image_get_data_size(hdr);
+				}
 				rc = fpga_load(dev, (void *)data, data_size);
 			}
 			break;
@@ -307,8 +209,8 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 				}
 
 				/* verify integrity */
-				if (!fit_image_check_hashes(fit_hdr, noffset)) {
-					puts("Bad Data Hash\n");
+				if (!fit_image_verify(fit_hdr, noffset)) {
+					puts ("Bad Data Hash\n");
 					return 1;
 				}