X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=common%2Fcmd_mp.c;h=a80c6421575ea3ade21165b2102f2af9af526a39;hb=7fc65bcf8a0a5463db86efbb273a40448c845efc;hp=4b27be495672201b35031ef4a3f5b335c8728341;hpb=5c877b1ae0a4219ed6bd8d32cf3f7106b81ecb3b;p=u-boot diff --git a/common/cmd_mp.c b/common/cmd_mp.c index 4b27be4956..a80c642157 100644 --- a/common/cmd_mp.c +++ b/common/cmd_mp.c @@ -1,33 +1,38 @@ /* * Copyright 2008-2009 Freescale Semiconductor, Inc. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #include #include -int +static int cpu_status_all(void) +{ + unsigned long cpuid; + + for (cpuid = 0; ; cpuid++) { + if (!is_core_valid(cpuid)) { + if (cpuid == 0) { + printf("Core num: %lu is not valid\n", cpuid); + return 1; + } + break; + } + cpu_status(cpuid); + } + + return 0; +} + +static int cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { unsigned long cpuid; + if (argc == 2 && strncmp(argv[1], "status", 6) == 0) + return cpu_status_all(); + if (argc < 3) return CMD_RET_USAGE; @@ -61,8 +66,15 @@ cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return 0; } +#ifdef CONFIG_SYS_LONGHELP +static char cpu_help_text[] = + " reset - Reset cpu \n" + "cpu status - Status of all cpus\n" + "cpu status - Status of cpu \n" + "cpu disable - Disable cpu \n" + "cpu release [args] - Release cpu at with [args]" #ifdef CONFIG_PPC -#define CPU_ARCH_HELP \ + "\n" " [args] : \n" \ " pir - processor id (if writeable)\n" \ " r3 - value for gpr 3\n" \ @@ -74,16 +86,10 @@ cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) " When cpu is released r4 and r5 = 0.\n" \ " r7 will contain the size of the initial mapped area" #endif + ""; +#endif U_BOOT_CMD( cpu, CONFIG_SYS_MAXARGS, 1, cpu_cmd, - "Multiprocessor CPU boot manipulation and release", - " reset - Reset cpu \n" - "cpu status - Status of cpu \n" - "cpu disable - Disable cpu \n" - "cpu release [args] - Release cpu at with [args]" -#ifdef CPU_ARCH_HELP - "\n" - CPU_ARCH_HELP -#endif + "Multiprocessor CPU boot manipulation and release", cpu_help_text );