X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=common%2Ffdt_support.c;h=496040b54c8daf0188eef1f8680d3ac45809d9ad;hb=55b0a39314562087143f439ecae57379b97db9aa;hp=718b635d99bb92f4366ff15492f6ad04fec0d5d6;hpb=07c9cd81170335307a3090add3cd37147d29482e;p=u-boot diff --git a/common/fdt_support.c b/common/fdt_support.c index 718b635d99..496040b54c 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -183,7 +183,7 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end, int force) } } - err = fdt_add_mem_rsv(fdt, initrd_start, initrd_end - initrd_start + 1); + err = fdt_add_mem_rsv(fdt, initrd_start, initrd_end - initrd_start); if (err < 0) { printf("fdt_initrd: %s\n", fdt_strerror(err)); return err; @@ -362,11 +362,40 @@ void do_fixup_by_compat_u32(void *fdt, const char *compat, do_fixup_by_compat(fdt, compat, prop, &val, 4, create); } -int fdt_fixup_memory(void *blob, u64 start, u64 size) +/* + * Get cells len in bytes + * if #NNNN-cells property is 2 then len is 8 + * otherwise len is 4 + */ +static int get_cells_len(void *blob, char *nr_cells_name) { - int err, nodeoffset, len = 0; - u8 tmp[16]; - const u32 *addrcell, *sizecell; + const u32 *cell; + + cell = fdt_getprop(blob, 0, nr_cells_name, NULL); + if (cell && *cell == 2) + return 8; + + return 4; +} + +/* + * Write a 4 or 8 byte big endian cell + */ +static void write_cell(u8 *addr, u64 val, int size) +{ + int shift = (size - 1) * 8; + while (size-- > 0) { + *addr++ = (val >> shift) & 0xff; + shift -= 8; + } +} + +int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks) +{ + int err, nodeoffset; + int addr_cell_len, size_cell_len, len; + u8 tmp[banks * 16]; /* Up to 64-bit address + 64-bit size */ + int bank; err = fdt_check_header(blob); if (err < 0) { @@ -391,44 +420,15 @@ int fdt_fixup_memory(void *blob, u64 start, u64 size) return err; } - addrcell = fdt_getprop(blob, 0, "#address-cells", NULL); - /* use shifts and mask to ensure endianness */ - if ((addrcell) && (*addrcell == 2)) { - tmp[0] = (start >> 56) & 0xff; - tmp[1] = (start >> 48) & 0xff; - tmp[2] = (start >> 40) & 0xff; - tmp[3] = (start >> 32) & 0xff; - tmp[4] = (start >> 24) & 0xff; - tmp[5] = (start >> 16) & 0xff; - tmp[6] = (start >> 8) & 0xff; - tmp[7] = (start ) & 0xff; - len = 8; - } else { - tmp[0] = (start >> 24) & 0xff; - tmp[1] = (start >> 16) & 0xff; - tmp[2] = (start >> 8) & 0xff; - tmp[3] = (start ) & 0xff; - len = 4; - } + addr_cell_len = get_cells_len(blob, "#address-cells"); + size_cell_len = get_cells_len(blob, "#size-cells"); + + for (bank = 0, len = 0; bank < banks; bank++) { + write_cell(tmp + len, start[bank], addr_cell_len); + len += addr_cell_len; - sizecell = fdt_getprop(blob, 0, "#size-cells", NULL); - /* use shifts and mask to ensure endianness */ - if ((sizecell) && (*sizecell == 2)) { - tmp[0+len] = (size >> 56) & 0xff; - tmp[1+len] = (size >> 48) & 0xff; - tmp[2+len] = (size >> 40) & 0xff; - tmp[3+len] = (size >> 32) & 0xff; - tmp[4+len] = (size >> 24) & 0xff; - tmp[5+len] = (size >> 16) & 0xff; - tmp[6+len] = (size >> 8) & 0xff; - tmp[7+len] = (size ) & 0xff; - len += 8; - } else { - tmp[0+len] = (size >> 24) & 0xff; - tmp[1+len] = (size >> 16) & 0xff; - tmp[2+len] = (size >> 8) & 0xff; - tmp[3+len] = (size ) & 0xff; - len += 4; + write_cell(tmp + len, size[bank], size_cell_len); + len += size_cell_len; } err = fdt_setprop(blob, nodeoffset, "reg", tmp, len); @@ -440,6 +440,11 @@ int fdt_fixup_memory(void *blob, u64 start, u64 size) return 0; } +int fdt_fixup_memory(void *blob, u64 start, u64 size) +{ + return fdt_fixup_memory_banks(blob, &start, &size, 1); +} + void fdt_fixup_ethernet(void *fdt) { int node, i, j; @@ -498,11 +503,12 @@ int fdt_resize(void *blob) /* * Calculate the actual size of the fdt - * plus the size needed for two fdt_add_mem_rsv, one - * for the fdt itself and one for a possible initrd + * plus the size needed for 5 fdt_add_mem_rsv, one + * for the fdt itself and 4 for a possible initrd + * ((initrd-start + initrd-end) * 2 (name & value)) */ actualsize = fdt_off_dt_strings(blob) + - fdt_size_dt_strings(blob) + 2*sizeof(struct fdt_reserve_entry); + fdt_size_dt_strings(blob) + 5 * sizeof(struct fdt_reserve_entry); /* Make it so the fdt ends on a page boundary */ actualsize = ALIGN(actualsize + ((uint)blob & 0xfff), 0x1000); @@ -589,37 +595,71 @@ int fdt_pci_dma_ranges(void *blob, int phb_off, struct pci_controller *hose) { #endif #ifdef CONFIG_FDT_FIXUP_NOR_FLASH_SIZE +/* + * Provide a weak default function to return the flash bank size. + * There might be multiple non-identical flash chips connected to one + * chip-select, so we need to pass an index as well. + */ +u32 __flash_get_bank_size(int cs, int idx) +{ + extern flash_info_t flash_info[]; + + /* + * As default, a simple 1:1 mapping is provided. Boards with + * a different mapping need to supply a board specific mapping + * routine. + */ + return flash_info[cs].size; +} +u32 flash_get_bank_size(int cs, int idx) + __attribute__((weak, alias("__flash_get_bank_size"))); + /* * This function can be used to update the size in the "reg" property - * of the NOR FLASH device nodes. This is necessary for boards with + * of all NOR FLASH device nodes. This is necessary for boards with * non-fixed NOR FLASH sizes. */ -int fdt_fixup_nor_flash_size(void *blob, int cs, u32 size) +int fdt_fixup_nor_flash_size(void *blob) { char compat[][16] = { "cfi-flash", "jedec-flash" }; int off; int len; struct fdt_property *prop; - u32 *reg; + u32 *reg, *reg2; int i; for (i = 0; i < 2; i++) { off = fdt_node_offset_by_compatible(blob, -1, compat[i]); while (off != -FDT_ERR_NOTFOUND) { + int idx; + /* - * Found one compatible node, now check if this one - * has the correct CS + * Found one compatible node, so fixup the size + * int its reg properties */ prop = fdt_get_property_w(blob, off, "reg", &len); if (prop) { - reg = (u32 *)&prop->data[0]; - if (reg[0] == cs) { - reg[2] = size; - fdt_setprop(blob, off, "reg", reg, - 3 * sizeof(u32)); - - return 0; + int tuple_size = 3 * sizeof(reg); + + /* + * There might be multiple reg-tuples, + * so loop through them all + */ + reg = reg2 = (u32 *)&prop->data[0]; + for (idx = 0; idx < (len / tuple_size); idx++) { + /* + * Update size in reg property + */ + reg[2] = flash_get_bank_size(reg[0], + idx); + + /* + * Point to next reg tuple + */ + reg += 3; } + + fdt_setprop(blob, off, "reg", reg2, len); } /* Move to next compatible node */ @@ -628,10 +668,20 @@ int fdt_fixup_nor_flash_size(void *blob, int cs, u32 size) } } - return -1; + return 0; } #endif +int fdt_increase_size(void *fdt, int add_len) +{ + int newlen; + + newlen = fdt_totalsize(fdt) + add_len; + + /* Open in place with a new len */ + return fdt_open_into(fdt, fdt, newlen); +} + #ifdef CONFIG_FDT_FIXUP_PARTITIONS #include #include @@ -666,16 +716,6 @@ int fdt_del_subnodes(const void *blob, int parent_offset) return 0; } -int fdt_increase_size(void *fdt, int add_len) -{ - int newlen; - - newlen = fdt_totalsize(fdt) + add_len; - - /* Open in place with a new len */ - return fdt_open_into(fdt, fdt, newlen); -} - int fdt_del_partitions(void *blob, int parent_offset) { const void *prop; @@ -873,35 +913,6 @@ static inline u64 of_read_number(const __be32 *cell, int size) return r; } -static int of_n_cells(const void *blob, int nodeoffset, const char *name) -{ - int np; - const int *ip; - - do { - np = fdt_parent_offset(blob, nodeoffset); - - if (np >= 0) - nodeoffset = np; - ip = (int *)fdt_getprop(blob, nodeoffset, name, NULL); - if (ip) - return be32_to_cpup(ip); - } while (np >= 0); - - /* No #-cells property for the root node */ - return 1; -} - -int of_n_addr_cells(const void *blob, int nodeoffset) -{ - return of_n_cells(blob, nodeoffset, "#address-cells"); -} - -int of_n_size_cells(const void *blob, int nodeoffset) -{ - return of_n_cells(blob, nodeoffset, "#size-cells"); -} - #define PRu64 "%llx" /* Max address size we deal with */ @@ -927,7 +938,7 @@ static void of_dump_addr(const char *s, const u32 *addr, int na) { } struct of_bus { const char *name; const char *addresses; - void (*count_cells)(void *blob, int offset, + void (*count_cells)(void *blob, int parentoffset, int *addrc, int *sizec); u64 (*map)(u32 *addr, const u32 *range, int na, int ns, int pna); @@ -935,13 +946,26 @@ struct of_bus { }; /* Default translator (generic bus) */ -static void of_bus_default_count_cells(void *blob, int offset, +static void of_bus_default_count_cells(void *blob, int parentoffset, int *addrc, int *sizec) { - if (addrc) - *addrc = of_n_addr_cells(blob, offset); - if (sizec) - *sizec = of_n_size_cells(blob, offset); + const u32 *prop; + + if (addrc) { + prop = fdt_getprop(blob, parentoffset, "#address-cells", NULL); + if (prop) + *addrc = be32_to_cpup((u32 *)prop); + else + *addrc = 2; + } + + if (sizec) { + prop = fdt_getprop(blob, parentoffset, "#size-cells", NULL); + if (prop) + *sizec = be32_to_cpup((u32 *)prop); + else + *sizec = 1; + } } static u64 of_bus_default_map(u32 *addr, const u32 *range, @@ -1067,7 +1091,7 @@ u64 __of_translate_address(void *blob, int node_offset, const u32 *in_addr, bus = &of_busses[0]; /* Cound address cells & copy address locally */ - bus->count_cells(blob, node_offset, &na, &ns); + bus->count_cells(blob, parent, &na, &ns); if (!OF_CHECK_COUNTS(na, ns)) { printf("%s: Bad cell count for %s\n", __FUNCTION__, fdt_get_name(blob, node_offset, NULL)); @@ -1094,7 +1118,7 @@ u64 __of_translate_address(void *blob, int node_offset, const u32 *in_addr, /* Get new parent bus and counts */ pbus = &of_busses[0]; - pbus->count_cells(blob, node_offset, &pna, &pns); + pbus->count_cells(blob, parent, &pna, &pns); if (!OF_CHECK_COUNTS(pna, pns)) { printf("%s: Bad cell count for %s\n", __FUNCTION__, fdt_get_name(blob, node_offset, NULL)); @@ -1151,4 +1175,51 @@ int fdt_node_offset_by_compat_reg(void *blob, const char *compat, return -FDT_ERR_NOTFOUND; } +/** + * fdt_alloc_phandle: Return next free phandle value + * + * @blob: ptr to device tree + */ +int fdt_alloc_phandle(void *blob) +{ + int offset, len, phandle = 0; + const u32 *val; + + for (offset = fdt_next_node(blob, -1, NULL); offset >= 0; + offset = fdt_next_node(blob, offset, NULL)) { + val = fdt_getprop(blob, offset, "linux,phandle", &len); + if (val) + phandle = max(*val, phandle); + } + + return phandle + 1; +} + +#if defined(CONFIG_VIDEO) +int fdt_add_edid(void *blob, const char *compat, unsigned char *edid_buf) +{ + int noff; + int ret; + noff = fdt_node_offset_by_compatible(blob, -1, compat); + if (noff != -FDT_ERR_NOTFOUND) { + debug("%s: %s\n", fdt_get_name(blob, noff, 0), compat); +add_edid: + ret = fdt_setprop(blob, noff, "edid", edid_buf, 128); + if (ret == -FDT_ERR_NOSPACE) { + ret = fdt_increase_size(blob, 512); + if (!ret) + goto add_edid; + else + goto err_size; + } else if (ret < 0) { + printf("Can't add property: %s\n", fdt_strerror(ret)); + return ret; + } + } + return 0; +err_size: + printf("Can't increase blob size: %s\n", fdt_strerror(ret)); + return ret; +} +#endif