X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=common%2Ffdt_support.c;h=f4f9543d5475d804e9059a51ccb199604605fc7b;hb=f957dec682dc2fa0363e09bfb5f41f008569245b;hp=a57a5759e4a030d9c03a5aad969703de787d41d6;hpb=21342d4aed6c77a4aa7a5b2579b3c23e21aea31a;p=u-boot diff --git a/common/fdt_support.c b/common/fdt_support.c index a57a5759e4..f4f9543d54 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -197,7 +197,7 @@ int fdt_root(void *fdt) return err; } - serial = getenv("serial#"); + serial = env_get("serial#"); if (serial) { err = fdt_setprop(fdt, 0, "serial-number", serial, strlen(serial) + 1); @@ -289,7 +289,7 @@ int fdt_chosen(void *fdt) if (nodeoffset < 0) return nodeoffset; - str = getenv("bootargs"); + str = env_get("bootargs"); if (str) { err = fdt_setprop(fdt, nodeoffset, "bootargs", str, strlen(str) + 1); @@ -473,7 +473,7 @@ void fdt_fixup_ethernet(void *fdt) char *tmp, *end; char mac[16]; const char *path; - unsigned char mac_addr[6]; + unsigned char mac_addr[ARP_HLEN]; int offset; if (fdt_path_offset(fdt, "/aliases") < 0) @@ -482,7 +482,6 @@ void fdt_fixup_ethernet(void *fdt) /* Cycle through all aliases */ for (prop = 0; ; prop++) { const char *name; - int len = strlen("ethernet"); /* FDT might have been edited, recompute the offset */ offset = fdt_first_property_offset(fdt, @@ -495,8 +494,13 @@ void fdt_fixup_ethernet(void *fdt) break; path = fdt_getprop_by_offset(fdt, offset, &name, NULL); - if (!strncmp(name, "ethernet", len)) { - i = trailing_strtol(name); + if (!strncmp(name, "ethernet", 8)) { + /* Treat plain "ethernet" same as "ethernet0". */ + if (!strcmp(name, "ethernet")) + i = 0; + else + i = trailing_strtol(name); + if (i != -1) { if (i == 0) strcpy(mac, "ethaddr"); @@ -505,7 +509,7 @@ void fdt_fixup_ethernet(void *fdt) } else { continue; } - tmp = getenv(mac); + tmp = env_get(mac); if (!tmp) continue; @@ -638,84 +642,6 @@ int fdt_pci_dma_ranges(void *blob, int phb_off, struct pci_controller *hose) { } #endif -#ifdef CONFIG_FDT_FIXUP_NOR_FLASH_SIZE -/* - * Provide a weak default function to return the flash bank size. - * There might be multiple non-identical flash chips connected to one - * chip-select, so we need to pass an index as well. - */ -u32 __flash_get_bank_size(int cs, int idx) -{ - extern flash_info_t flash_info[]; - - /* - * As default, a simple 1:1 mapping is provided. Boards with - * a different mapping need to supply a board specific mapping - * routine. - */ - return flash_info[cs].size; -} -u32 flash_get_bank_size(int cs, int idx) - __attribute__((weak, alias("__flash_get_bank_size"))); - -/* - * This function can be used to update the size in the "reg" property - * of all NOR FLASH device nodes. This is necessary for boards with - * non-fixed NOR FLASH sizes. - */ -int fdt_fixup_nor_flash_size(void *blob) -{ - char compat[][16] = { "cfi-flash", "jedec-flash" }; - int off; - int len; - struct fdt_property *prop; - u32 *reg, *reg2; - int i; - - for (i = 0; i < 2; i++) { - off = fdt_node_offset_by_compatible(blob, -1, compat[i]); - while (off != -FDT_ERR_NOTFOUND) { - int idx; - - /* - * Found one compatible node, so fixup the size - * int its reg properties - */ - prop = fdt_get_property_w(blob, off, "reg", &len); - if (prop) { - int tuple_size = 3 * sizeof(reg); - - /* - * There might be multiple reg-tuples, - * so loop through them all - */ - reg = reg2 = (u32 *)&prop->data[0]; - for (idx = 0; idx < (len / tuple_size); idx++) { - /* - * Update size in reg property - */ - reg[2] = flash_get_bank_size(reg[0], - idx); - - /* - * Point to next reg tuple - */ - reg += 3; - } - - fdt_setprop(blob, off, "reg", reg2, len); - } - - /* Move to next compatible node */ - off = fdt_node_offset_by_compatible(blob, off, - compat[i]); - } - } - - return 0; -} -#endif - int fdt_increase_size(void *fdt, int add_len) { int newlen; @@ -1004,7 +930,7 @@ struct of_bus { }; /* Default translator (generic bus) */ -void of_bus_default_count_cells(const void *blob, int parentoffset, +void fdt_support_default_count_cells(const void *blob, int parentoffset, int *addrc, int *sizec) { const fdt32_t *prop; @@ -1026,9 +952,9 @@ static u64 of_bus_default_map(fdt32_t *addr, const fdt32_t *range, { u64 cp, s, da; - cp = of_read_number(range, na); - s = of_read_number(range + na + pna, ns); - da = of_read_number(addr, na); + cp = fdt_read_number(range, na); + s = fdt_read_number(range + na + pna, ns); + da = fdt_read_number(addr, na); debug("OF: default map, cp=%" PRIu64 ", s=%" PRIu64 ", da=%" PRIu64 "\n", cp, s, da); @@ -1040,7 +966,7 @@ static u64 of_bus_default_map(fdt32_t *addr, const fdt32_t *range, static int of_bus_default_translate(fdt32_t *addr, u64 offset, int na) { - u64 a = of_read_number(addr, na); + u64 a = fdt_read_number(addr, na); memset(addr, 0, na * 4); a += offset; if (na > 1) @@ -1082,9 +1008,9 @@ static u64 of_bus_isa_map(fdt32_t *addr, const fdt32_t *range, if ((addr[0] ^ range[0]) & cpu_to_be32(1)) return OF_BAD_ADDR; - cp = of_read_number(range + 1, na - 1); - s = of_read_number(range + na + pna, ns); - da = of_read_number(addr + 1, na - 1); + cp = fdt_read_number(range + 1, na - 1); + s = fdt_read_number(range + na + pna, ns); + da = fdt_read_number(addr + 1, na - 1); debug("OF: ISA map, cp=%" PRIu64 ", s=%" PRIu64 ", da=%" PRIu64 "\n", cp, s, da); @@ -1118,7 +1044,7 @@ static struct of_bus of_busses[] = { { .name = "default", .addresses = "reg", - .count_cells = of_bus_default_count_cells, + .count_cells = fdt_support_default_count_cells, .map = of_bus_default_map, .translate = of_bus_default_translate, }, @@ -1169,7 +1095,7 @@ static int of_translate_one(const void *blob, int parent, struct of_bus *bus, */ ranges = fdt_getprop(blob, parent, rprop, &rlen); if (ranges == NULL || rlen == 0) { - offset = of_read_number(addr, na); + offset = fdt_read_number(addr, na); memset(addr, 0, pna * 4); debug("OF: no ranges, 1:1 translation\n"); goto finish; @@ -1249,7 +1175,7 @@ static u64 __of_translate_address(const void *blob, int node_offset, /* If root, we have finished */ if (parent < 0) { debug("OF: reached root node\n"); - result = of_read_number(addr, na); + result = fdt_read_number(addr, na); break; } @@ -1535,17 +1461,14 @@ int fdt_verify_alias_address(void *fdt, int anode, const char *alias, u64 addr) /* * Returns the base address of an SOC or PCI node */ -u64 fdt_get_base_address(void *fdt, int node) +u64 fdt_get_base_address(const void *fdt, int node) { int size; - u32 naddr; const fdt32_t *prop; - naddr = fdt_address_cells(fdt, node); - - prop = fdt_getprop(fdt, node, "ranges", &size); + prop = fdt_getprop(fdt, node, "reg", &size); - return prop ? fdt_translate_address(fdt, node, prop + naddr) : 0; + return prop ? fdt_translate_address(fdt, node, prop) : 0; } /* @@ -1662,8 +1585,8 @@ int fdt_setup_simplefb_node(void *fdt, int node, u64 base_address, u32 width, fdt32_t cells[4]; int i, addrc, sizec, ret; - of_bus_default_count_cells(fdt, fdt_parent_offset(fdt, node), - &addrc, &sizec); + fdt_support_default_count_cells(fdt, fdt_parent_offset(fdt, node), + &addrc, &sizec); i = 0; if (addrc == 2) cells[i++] = cpu_to_fdt32(base_address >> 32); @@ -1732,3 +1655,34 @@ int fdt_fixup_display(void *blob, const char *path, const char *display) } return toff; } + +#ifdef CONFIG_OF_LIBFDT_OVERLAY +/** + * fdt_overlay_apply_verbose - Apply an overlay with verbose error reporting + * + * @fdt: ptr to device tree + * @fdto: ptr to device tree overlay + * + * Convenience function to apply an overlay and display helpful messages + * in the case of an error + */ +int fdt_overlay_apply_verbose(void *fdt, void *fdto) +{ + int err; + bool has_symbols; + + err = fdt_path_offset(fdt, "/__symbols__"); + has_symbols = err >= 0; + + err = fdt_overlay_apply(fdt, fdto); + if (err < 0) { + printf("failed on fdt_overlay_apply(): %s\n", + fdt_strerror(err)); + if (!has_symbols) { + printf("base fdt does did not have a /__symbols__ node\n"); + printf("make sure you've compiled with -@\n"); + } + } + return err; +} +#endif