X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=common%2Fmiiphyutil.c;h=2b0dcf4f2ce1af67d7f02f7100757dad921c85d4;hb=82f4c6ac84b3fe81359f863a476196def9fb35ab;hp=03964da81f685f444ee6ffbf4749ab6a1000422c;hpb=5653fc335a450fa46d89989e1afe5e8bb9a0a52e;p=u-boot

diff --git a/common/miiphyutil.c b/common/miiphyutil.c
index 03964da81f..2b0dcf4f2c 100644
--- a/common/miiphyutil.c
+++ b/common/miiphyutil.c
@@ -51,7 +51,7 @@ int miiphy_info (unsigned char addr,
 
 	if (miiphy_read (addr, PHY_PHYIDR2, &tmp) != 0) {
 #ifdef DEBUG
-		printf ("PHY ID register 2 read failed\n");
+		puts ("PHY ID register 2 read failed\n");
 #endif
 		return (-1);
 	}
@@ -67,7 +67,7 @@ int miiphy_info (unsigned char addr,
 
 	if (miiphy_read (addr, PHY_PHYIDR1, &tmp) != 0) {
 #ifdef DEBUG
-		printf ("PHY ID register 1 read failed\n");
+		puts ("PHY ID register 1 read failed\n");
 #endif
 		return (-1);
 	}
@@ -95,7 +95,7 @@ int miiphy_reset (unsigned char addr)
 
 	if (miiphy_write (addr, PHY_BMCR, 0x8000) != 0) {
 #ifdef DEBUG
-		printf ("PHY reset failed\n");
+		puts ("PHY reset failed\n");
 #endif
 		return (-1);
 	}
@@ -112,7 +112,7 @@ int miiphy_reset (unsigned char addr)
 	while (((reg & 0x8000) != 0) && (loop_cnt++ < 1000000)) {
 		if (miiphy_read (addr, PHY_BMCR, &reg) != 0) {
 #     ifdef DEBUG
-			printf ("PHY status read failed\n");
+			puts ("PHY status read failed\n");
 #     endif
 			return (-1);
 		}
@@ -120,7 +120,7 @@ int miiphy_reset (unsigned char addr)
 	if ((reg & 0x8000) == 0) {
 		return (0);
 	} else {
-		printf ("PHY reset timed out\n");
+		puts ("PHY reset timed out\n");
 		return (-1);
 	}
 	return (0);
@@ -135,16 +135,43 @@ int miiphy_speed (unsigned char addr)
 {
 	unsigned short reg;
 
-	if (miiphy_read (addr, PHY_ANLPAR, &reg)) {
-		printf ("PHY speed1 read failed, assuming 10bT\n");
-		return (_10BASET);
+#if defined(CONFIG_PHY_GIGE)
+	if (miiphy_read (addr, PHY_1000BTSR, &reg)) {
+		printf ("PHY 1000BT Status read failed\n");
+	} else {
+		if (reg != 0xFFFF) {
+			if ((reg & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) !=0) {
+				return (_1000BASET);
+			}
+		}
 	}
+#endif /* CONFIG_PHY_GIGE */
 
-	if ((reg & PHY_ANLPAR_100) != 0) {
+	/* Check Basic Management Control Register first. */
+	if (miiphy_read (addr, PHY_BMCR, &reg)) {
+		puts ("PHY speed read failed, assuming 10bT\n");
+		return (_10BASET);
+	}
+	/* Check if auto-negotiation is on. */
+	if ((reg & PHY_BMCR_AUTON) != 0) {
+		/* Get auto-negotiation results. */
+		if (miiphy_read (addr, PHY_ANLPAR, &reg)) {
+			puts ("PHY AN speed read failed, assuming 10bT\n");
+			return (_10BASET);
+		}
+		if ((reg & PHY_ANLPAR_100) != 0) {
+			return (_100BASET);
+		} else {
+			return (_10BASET);
+		}
+	}
+	/* Get speed from basic control settings. */
+	else if (reg & PHY_BMCR_100MB) {
 		return (_100BASET);
 	} else {
 		return (_10BASET);
 	}
+
 }
 
 
@@ -156,16 +183,47 @@ int miiphy_duplex (unsigned char addr)
 {
 	unsigned short reg;
 
-	if (miiphy_read (addr, PHY_ANLPAR, &reg)) {
-		printf ("PHY duplex read failed, assuming half duplex\n");
+#if defined(CONFIG_PHY_GIGE)
+	if (miiphy_read (addr, PHY_1000BTSR, &reg)) {
+		printf ("PHY 1000BT Status read failed\n");
+	} else {
+		if ( (reg != 0xFFFF) &&
+		     (reg & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) ) {
+			if ((reg & PHY_1000BTSR_1000FD) !=0) {
+				return (FULL);
+			} else {
+				return (HALF);
+			}
+		}
+	}
+#endif /* CONFIG_PHY_GIGE */
+
+	/* Check Basic Management Control Register first. */
+	if (miiphy_read (addr, PHY_BMCR, &reg)) {
+		puts ("PHY duplex read failed, assuming half duplex\n");
 		return (HALF);
 	}
+	/* Check if auto-negotiation is on. */
+	if ((reg & PHY_BMCR_AUTON) != 0) {
+		/* Get auto-negotiation results. */
+		if (miiphy_read (addr, PHY_ANLPAR, &reg)) {
+			puts ("PHY AN duplex read failed, assuming half duplex\n");
+			return (HALF);
+		}
 
-	if ((reg & (PHY_ANLPAR_10FD | PHY_ANLPAR_TXFD)) != 0) {
+		if ((reg & (PHY_ANLPAR_10FD | PHY_ANLPAR_TXFD)) != 0) {
+			return (FULL);
+		} else {
+			return (HALF);
+		}
+	}
+	/* Get speed from basic control settings. */
+	else if (reg & PHY_BMCR_DPLX) {
 		return (FULL);
 	} else {
 		return (HALF);
 	}
+
 }
 
 #ifdef CFG_FAULT_ECHO_LINK_DOWN
@@ -177,8 +235,10 @@ int miiphy_link (unsigned char addr)
 {
 	unsigned short reg;
 
+	/* dummy read; needed to latch some phys */
+	(void)miiphy_read(addr, PHY_BMSR, &reg);
 	if (miiphy_read (addr, PHY_BMSR, &reg)) {
-		printf ("PHY_BMSR read failed, assuming no link\n");
+		puts ("PHY_BMSR read failed, assuming no link\n");
 		return (0);
 	}