X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=common%2Fmiiphyutil.c;h=66fd9cad8725b067ce9427500020232c2e72813f;hb=1eb734fed3b79a5e6106dad16e88041894fdab30;hp=281f0b29e3bc1c006e312ee6188e9892b7ef5ab5;hpb=e5e3d7d520073701be0276e3e1c607149fc9be87;p=u-boot

diff --git a/common/miiphyutil.c b/common/miiphyutil.c
index 281f0b29e3..66fd9cad87 100644
--- a/common/miiphyutil.c
+++ b/common/miiphyutil.c
@@ -29,14 +29,12 @@
 #include <common.h>
 #include <miiphy.h>
 
-#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
 #include <asm/types.h>
 #include <linux/list.h>
 #include <malloc.h>
 #include <net.h>
 
 /* local debug macro */
-#define MII_DEBUG
 #undef MII_DEBUG
 
 #undef debug
@@ -261,31 +259,25 @@ int miiphy_info (char *devname, unsigned char addr, unsigned int *oui,
 	unsigned short tmp;
 
 	if (miiphy_read (devname, addr, PHY_PHYIDR2, &tmp) != 0) {
-#ifdef DEBUG
-		puts ("PHY ID register 2 read failed\n");
-#endif
+		debug ("PHY ID register 2 read failed\n");
 		return (-1);
 	}
 	reg = tmp;
 
-#ifdef DEBUG
-	printf ("PHY_PHYIDR2 @ 0x%x = 0x%04x\n", addr, reg);
-#endif
+	debug ("PHY_PHYIDR2 @ 0x%x = 0x%04x\n", addr, reg);
+
 	if (reg == 0xFFFF) {
 		/* No physical device present at this address */
 		return (-1);
 	}
 
 	if (miiphy_read (devname, addr, PHY_PHYIDR1, &tmp) != 0) {
-#ifdef DEBUG
-		puts ("PHY ID register 1 read failed\n");
-#endif
+		debug ("PHY ID register 1 read failed\n");
 		return (-1);
 	}
 	reg |= tmp << 16;
-#ifdef DEBUG
-	printf ("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
-#endif
+	debug ("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
+
 	*oui = (reg >> 10);
 	*model = (unsigned char)((reg >> 4) & 0x0000003F);
 	*rev = (unsigned char)(reg & 0x0000000F);
@@ -304,15 +296,11 @@ int miiphy_reset (char *devname, unsigned char addr)
 	int loop_cnt;
 
 	if (miiphy_read (devname, addr, PHY_BMCR, &reg) != 0) {
-#ifdef DEBUG
-		printf ("PHY status read failed\n");
-#endif
+		debug ("PHY status read failed\n");
 		return (-1);
 	}
 	if (miiphy_write (devname, addr, PHY_BMCR, reg | 0x8000) != 0) {
-#ifdef DEBUG
-		puts ("PHY reset failed\n");
-#endif
+		debug ("PHY reset failed\n");
 		return (-1);
 	}
 #ifdef CONFIG_PHY_RESET_DELAY
@@ -327,9 +315,7 @@ int miiphy_reset (char *devname, unsigned char addr)
 	reg = 0x8000;
 	while (((reg & 0x8000) != 0) && (loop_cnt++ < 1000000)) {
 		if (miiphy_read (devname, addr, PHY_BMCR, &reg) != 0) {
-#     ifdef DEBUG
-			puts ("PHY status read failed\n");
-#     endif
+			debug ("PHY status read failed\n");
 			return (-1);
 		}
 	}
@@ -476,7 +462,7 @@ int miiphy_is_1000base_x (char *devname, unsigned char addr)
 #endif
 }
 
-#ifdef CFG_FAULT_ECHO_LINK_DOWN
+#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 /*****************************************************************************
  *
  * Determine link status
@@ -500,4 +486,3 @@ int miiphy_link (char *devname, unsigned char addr)
 	}
 }
 #endif
-#endif /* CONFIG_MII */