X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=configs%2FT1042RDB_PI_NAND_SECURE_BOOT_defconfig;h=a7a3d904378c2ad22766966cc2ff600e491ca371;hb=HEAD;hp=a37d0dfceee20f1cbdb0a42ded94078afead354b;hpb=2ee87b0c1a5439e4ad6467cb8d5e8fb58922ca4b;p=u-boot diff --git a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig index a37d0dfcee..a7a3d90437 100644 --- a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig +++ b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig @@ -1,11 +1,11 @@ CONFIG_PPC=y +CONFIG_SYS_TEXT_BASE=0x30001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SECURE_BOOT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y -CONFIG_VIDEO=y +CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042RDB_PI=y CONFIG_FIT=y @@ -18,12 +18,14 @@ CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_SPL=y +CONFIG_BOARD_EARLY_INIT_R=y +# CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_CRYPTO_SUPPORT=y CONFIG_SPL_HASH_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y @@ -36,11 +38,15 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_BMP=y CONFIG_CMD_DATE=y +CONFIG_MP=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0" +CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:2m(uboot),9m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:2m(uboot),9m(kernel),128k(dtb),-(user)" CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SYS_FSL_DDR3=y +CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_NAND=y CONFIG_SPI_FLASH=y @@ -50,9 +56,11 @@ CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_SYS_NS16550=y +CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y +CONFIG_VIDEO=y CONFIG_CFB_CONSOLE_ANSI=y CONFIG_RSA=y CONFIG_SPL_RSA=y