X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=configs%2Fsocfpga_arria5_defconfig;h=cf4fa20f2c1c76eae16311bd16d0a8b9aa837c1d;hb=34330a362f9ae89abfa5be312296e03f723704dd;hp=abb89b2e66b8b73f4989c79fbc0cf5ac1be524ce;hpb=9b1b6d42256a4c2e59c803afdbf90d39371e61ba;p=u-boot diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index abb89b2e66..cf4fa20f2c 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -5,7 +5,12 @@ CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk" CONFIG_FIT=y +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y +CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y +CONFIG_DEFAULT_FDT_FILE="socfpga_arria5_socdk.dtb" CONFIG_VERSION_VARIABLE=y +# CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y @@ -14,15 +19,15 @@ CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y +CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y -CONFIG_CMD_I2C=y CONFIG_CMD_USB=y -CONFIG_CMD_DFU=y CONFIG_CMD_USB_MASS_STORAGE=y -CONFIG_CMD_GPIO=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -31,17 +36,24 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_UBI=y +CONFIG_ENV_IS_IN_MMC=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_DFU_MMC=y +CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_SYS_I2C_DW=y CONFIG_DM_MMC=y +CONFIG_MMC_DW=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_SYS_NS16550=y @@ -49,6 +61,7 @@ CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DWC2_OTG=y