X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=configs%2Fsocfpga_sr1500_defconfig;h=b7494f01214890aeed1046cbbf696fa23817e194;hb=04ab29ab257598b0e33785c075c9163ea090e6b7;hp=814b11138f0f542d5a481c65add2efa296d4e846;hpb=cbe7706ab8aab06c18edaa9b120371f9c8012728;p=u-boot diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index 814b11138f..b7494f0121 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -1,48 +1,64 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y +CONFIG_SYS_TEXT_BASE=0x01000040 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SOCFPGA_SR1500=y +CONFIG_SPL=y CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500" +CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y +# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y +CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y +CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_sr1500.dtb" CONFIG_VERSION_VARIABLE=y -CONFIG_SPL=y +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set +CONFIG_SPL_SPI_LOAD=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y -CONFIG_CMD_I2C=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y -CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y +CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0" +CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)0" CONFIG_CMD_UBI=y +# CONFIG_ISO_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8 +CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y +CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y CONFIG_DM_MMC=y +CONFIG_MMC_DW=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_DM_ETH=y +CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DM_RESET=y CONFIG_SYS_NS16550=y +CONFIG_SPI=y CONFIG_CADENCE_QSPI=y CONFIG_USE_TINY_PRINTF=y